Jingyue Wu b043278834 [NVPTX] Do not emit .weak symbols for NVPTX ...

Summary:
".weak" symbols cannot be consumed by ptxas (PR21685). This patch makes the
weak directive in MCAsmPrinter customizable, and disables emitting ".weak"
symbols for NVPTX.

Test Plan: weak-linkage.ll

Reviewers: jholewinski

Reviewed By: jholewinski

Subscribers: majnemer, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D6455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223077 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-01 21:16:17 +00:00

..

access-non-generic.ll

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add-128bit.ll

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addrspacecast-gvar.ll

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addrspacecast.ll

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aggr-param.ll

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annotations.ll

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arg-lowering.ll

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arithmetic-fp-sm20.ll

[NVPTX] Improve handling of FP fusion

2014-07-17 18:10:09 +00:00

arithmetic-int.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

atomics.ll

Add some tests for NVPTX lowering of cmpxchg

2014-07-21 22:54:44 +00:00

bfe.ll

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bug17709.ll

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bug21465.ll

[NVPTX] Add NVPTXLowerStructArgs pass

2014-11-05 18:19:30 +00:00

call-with-alloca-buffer.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

callchain.ll

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calling-conv.ll

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compare-int.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

constant-vectors.ll

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convert-fp.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

convert-int-sm20.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ctlz.ll

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ctpop.ll

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cttz.ll

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div-ri.ll

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envreg.ll

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fast-math.ll

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fma-disable.ll

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fma.ll

[NVPTX] Improve handling of FP fusion

2014-07-17 18:10:09 +00:00

fp16.ll

NVPTX: support direct f16 <-> f64 conversions via intrinsics.

2014-07-18 08:30:10 +00:00

fp-contract.ll

[NVPTX] Improve handling of FP fusion

2014-07-17 18:10:09 +00:00

fp-literals.ll

[NVPTX] Improve handling of FP fusion

2014-07-17 18:10:09 +00:00

generic-to-nvvm.ll

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global-ordering.ll

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gvar-init.ll

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half.ll

NVPTX: support fpext/fptrunc to and from f16.

2014-07-18 13:01:43 +00:00

i1-global.ll

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i1-int-to-fp.ll

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i1-param.ll

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i8-param.ll

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imad.ll

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implicit-def.ll

[NVPTX] Improve handling of FP fusion

2014-07-17 18:10:09 +00:00

inline-asm.ll

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intrin-nocapture.ll

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intrinsic-old.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

intrinsics.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

isspacep.ll

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ld-addrspace.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ld-generic.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ldparam-v4.ll

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ldu-i8.ll

[NVPTX] Make the alignment an explicit argument to ldu/ldg

2014-08-29 15:30:20 +00:00

ldu-ldg.ll

[NVPTX] Make the alignment an explicit argument to ldu/ldg

2014-08-29 15:30:20 +00:00

ldu-reg-plus-offset.ll

[NVPTX] Make the alignment an explicit argument to ldu/ldg

2014-08-29 15:30:20 +00:00

lit.local.cfg

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load-sext-i1.ll

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local-stack-frame.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

machine-sink.ll

[MachineSink] Use the real post dominator tree

2014-10-15 03:27:43 +00:00

managed.ll

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misaligned-vector-ldst.ll

[NVPTX] Honor alignment on vector loads/stores

2014-07-16 19:45:35 +00:00

module-inline-asm.ll

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mulwide.ll

[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types

2014-07-23 20:23:49 +00:00

noduplicate-syncthreads.ll

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nvvm-reflect.ll

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param-align.ll

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pr13291-i1-store.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

pr16278.ll

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pr17529.ll

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ptx-version-30.ll

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ptx-version-31.ll

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refl1.ll

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rotate.ll

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rsqrt.ll

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sched1.ll

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sched2.ll

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sext-in-reg.ll

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sext-params.ll

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shift-parts.ll

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simple-call.ll

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sm-version-20.ll

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sm-version-21.ll

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sm-version-30.ll

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sm-version-35.ll

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st-addrspace.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

st-generic.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

surf-read-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

surf-read.ll

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surf-write-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

surf-write.ll

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symbol-naming.ll

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tex-read-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

tex-read.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

texsurf-queries.ll

[NVPTX] Flag surface/texture query instructions with IsTexSurfQuery

2014-07-17 14:51:33 +00:00

tuple-literal.ll

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vec8.ll

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vec-param-load.ll

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vector-args.ll

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vector-call.ll

[NVPTX] Add missing .v4 qualifier on vector store instruction

2014-07-17 16:58:56 +00:00

vector-compare.ll

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vector-loads.ll

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vector-return.ll

[NVPTX] aligned byte-buffers for vector return types

2014-10-25 03:46:16 +00:00

vector-select.ll

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vector-stores.ll

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weak-global.ll

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weak-linkage.ll

[NVPTX] Do not emit .weak symbols for NVPTX

2014-12-01 21:16:17 +00:00