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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-22 07:32:48 +00:00
llvm-6502/lib/Target/PowerPC
Chris Lattner a3c4454c5f add an idea
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23020 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-24 18:15:24 +00:00
..
.cvsignore
LICENSE.TXT
Makefile
PowerPC.td
PowerPCInstrInfo.h
PowerPCTargetMachine.h
PPC32.td
PPC32JITInfo.h
PPC32RegisterInfo.td Split RegisterClass 'Methods' into MethodProtos and MethodBodies 2005-08-19 19:13:20 +00:00
PPC64.td
PPC64RegisterInfo.td Split RegisterClass 'Methods' into MethodProtos and MethodBodies 2005-08-19 19:13:20 +00:00
PPC.h
PPCAsmPrinter.cpp Nate noticed that 30% of the malloc/frees in llc come from calls to LowercaseString 2005-08-22 22:00:02 +00:00
PPCBranchSelector.cpp
PPCCodeEmitter.cpp
PPCFrameInfo.h
PPCInstrBuilder.h
PPCInstrFormats.td
PPCInstrInfo.cpp
PPCInstrInfo.h
PPCInstrInfo.td Remove some instructions we no longer generate 2005-08-23 01:16:46 +00:00
PPCISelDAGToDAG.cpp Remove unused statistic 2005-08-24 05:03:20 +00:00
PPCISelLowering.cpp Ack, typo 2005-08-23 05:45:10 +00:00
PPCISelLowering.h
PPCISelPattern.cpp Whoops, fix a thinko. All cases except SETNE are now handled by the 2005-08-24 05:06:48 +00:00
PPCJITInfo.cpp
PPCJITInfo.h
PPCRegisterInfo.cpp Now that the simple isels are dead, so is this. 2005-08-19 18:30:39 +00:00
PPCRegisterInfo.h Now that the simple isels are dead, so is this. 2005-08-19 18:30:39 +00:00
PPCRegisterInfo.td Remove some regs that are not used. 2005-08-22 22:32:13 +00:00
PPCRelocations.h
PPCSubtarget.cpp
PPCSubtarget.h
PPCTargetMachine.cpp
PPCTargetMachine.h
README.txt add an idea 2005-08-24 18:15:24 +00:00

TODO:
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* be able to combine sequences like the following into 2 instructions:
	lis r2, ha16(l2__ZTV4Cell)
	la r2, lo16(l2__ZTV4Cell)(r2)
	addi r2, r2, 8

* Teach LLVM how to codegen this:
unsigned short foo(float a) { return a; }
as:
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr
not:
_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr


* Support 'update' load/store instructions.  These are cracked on the G5, but
  are still a codesize win.

* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
  stub stuff from the instruction selector to the legalizer (exposing low-level
  operations to the dag for optzn.  For example, we want to codegen this:

        int A = 0;
        void B() { A++; }
  as:
        lis r9,ha16(_A)
        lwz r2,lo16(_A)(r9)
        addi r2,r2,1
        stw r2,lo16(_A)(r9)
  not:
        lis r2, ha16(_A)
        lwz r2, lo16(_A)(r2)
        addi r2, r2, 1
        lis r3, ha16(_A)
        stw r2, lo16(_A)(r3)

* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

===-------------------------------------------------------------------------===

* Codegen this:

   void test2(int X) {
     if (X == 0x12345678) bar();
   }

    as:

       xoris r0,r3,0x1234
       cmpwi cr0,r0,0x5678
       beq cr0,L6

    not:

        lis r2, 4660
        ori r2, r2, 22136 
        cmpw cr0, r3, r2  
        bne .LBB_test2_2

===-------------------------------------------------------------------------===

Lump the constant pool for each function into ONE pic object, and reference
pieces of it as offsets from the start.  For functions like this (contrived
to have lots of constants obviously):

double X(double Y) { return (Y*1.23 + 4.512)*2.34 + 14.38; }

We generate:

_X:
        lis r2, ha16(.CPI_X_0)
        lfd f0, lo16(.CPI_X_0)(r2)
        lis r2, ha16(.CPI_X_1)
        lfd f2, lo16(.CPI_X_1)(r2)
        fmadd f0, f1, f0, f2
        lis r2, ha16(.CPI_X_2)
        lfd f1, lo16(.CPI_X_2)(r2)
        lis r2, ha16(.CPI_X_3)
        lfd f2, lo16(.CPI_X_3)(r2)
        fmadd f1, f0, f1, f2
        blr

It would be better to materialize .CPI_X into a register, then use immediates
off of the register to avoid the lis's.  This is even more important in PIC 
mode.

===-------------------------------------------------------------------------===