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LLVM backend for 6502
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Jim Grosbach a45e3747e6 ARM encoding for VSWP got the second operand incorrect. 
Make the non-tied register operand names line up with what the base
class encoding handler expects.

rdar://11157236

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153766 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-30 18:53:01 +00:00
autoconf Add InitializeNativeTargetDisassembler function. 2012-03-26 21:56:56 +00:00
bindings [python] Add negative MemoryBuffer testcase 2012-03-22 11:23:52 +00:00
cmake Add InitializeNativeTargetDisassembler function. 2012-03-26 21:56:56 +00:00
docs Drop O4 from the llc manpage, it was removed in r70445. 2012-03-29 20:40:18 +00:00
examples
include Compress register lists by sharing suffixes. 2012-03-30 17:25:43 +00:00
lib ARM encoding for VSWP got the second operand incorrect. 2012-03-30 18:53:01 +00:00
projects Add InitializeNativeTargetDisassembler function. 2012-03-26 21:56:56 +00:00
runtime Use the correct filename for the error message. 2012-03-28 02:39:06 +00:00
test ARM encoding for VSWP got the second operand incorrect. 2012-03-30 18:53:01 +00:00
tools Re-factored RuntimeDyLd: 2012-03-30 16:45:19 +00:00
unittests Handle unreachable code in the dominates functions. This changes users when 2012-03-30 16:46:21 +00:00
utils Compress SimpleValueType lists by sharing. 2012-03-30 17:42:04 +00:00
.gitignore
CMakeLists.txt Remove the C backend. 2012-03-23 05:50:46 +00:00
configure Add InitializeNativeTargetDisassembler function. 2012-03-26 21:56:56 +00:00
CREDITS.TXT sort by alpha. 2012-03-12 21:12:59 +00:00
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt
Makefile
Makefile.common
Makefile.config.in Add profiling support for Intel Parallel Amplifier XE (VTune) for JITted code in LLVM. 2012-03-13 08:33:15 +00:00
Makefile.rules
README.txt test commit 2012-03-20 13:12:38 +00:00

README.txt 

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