llvm-6502/test/MC/Disassembler
Jim Grosbach 05ae0c6026 Reapply r113875 with additional cleanups.
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."

Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 23:54:06 +00:00
..
arm-tests.txt Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid 2010-08-17 17:23:19 +00:00
dg.exp tests: MC/Disassembler tests depend on ARM support being compiler in. 2010-04-15 03:47:20 +00:00
neon-tests.txt Reapply r113875 with additional cleanups. 2010-09-14 23:54:06 +00:00
simple-tests.txt my work on adding segment registers to LEA missed the 2010-07-13 04:23:55 +00:00
thumb-tests.txt Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid 2010-08-17 17:23:19 +00:00