llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-23 20:29:30 +00:00

History

Pete Cooper a4f66d25fc Commute the internal flag on MachineOperands.

When commuting a thumb instruction in the size reduction pass, thumb
instructions are represented as a bundle and so some operands may be marked
as internal.  The internal flag has to move with the operand when commuting.

This test is sensitive to register allocation so can't specifically check that
this error was happening, but so long as it continues to pass with -verify then
hopefully its still ok.

rdar://problem/20752113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236282 91177308-0d34-0410-b5e6-96231b3b80d8

2015-04-30 23:14:14 +00:00

AArch64

[AArch64] Fix bad register class constraint in fast-isel for TST instruction.

2015-04-30 22:27:20 +00:00

ARM

Commute the internal flag on MachineOperands.

2015-04-30 23:14:14 +00:00

BPF

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction

2015-04-16 23:24:18 +00:00

CPP

[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction