David Chisnall a54b2dfb0a Add test cases for correct parsing of register names in 32- and 64-bit modes. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165713 91177308-0d34-0410-b5e6-96231b3b80d8

2012-10-11 12:42:49 +00:00

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do_switch.ll

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elf_basic.s

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elf-bigendian.ll

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elf-N64.ll

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elf-objdump.s

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elf-relsym.ll

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elf-tls.ll

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higher_highest.ll

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lea_64.ll

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lit.local.cfg

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mips64-register-names.s

Add test cases for correct parsing of register names in 32- and 64-bit modes.

2012-10-11 12:42:49 +00:00

mips64extins.ll

The instruction DINS may be transformed into DINSU or DEXTM depending

2012-08-31 18:06:48 +00:00

mips64shift.ll

Some instructions are passed to the assembler to be

2012-08-28 19:07:39 +00:00

mips_directives.s

This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:

2012-10-04 02:29:46 +00:00

mips-alu-instructions.s

The Mips standalone assembler aliased instruction support.

2012-09-07 01:42:38 +00:00

mips-coprocessor-encodings.s

Expose move to/from coprocessor instructions in MIPS64 mode.

2012-10-11 10:21:34 +00:00

mips-expansions.s

Initial assembler implementation of Mips load address macro

2012-10-09 23:29:45 +00:00

mips-fpu-instructions.s

Adding support for instructions mfc0, mfc2, mtc0, mtc2

2012-10-06 01:17:37 +00:00

mips-jump-instructions.s

The Mips standalone assembler aliased instruction support.

2012-09-07 01:42:38 +00:00

mips-memory-instructions.s

The Mips standalone assembler fpu instruction support.

2012-09-07 00:23:42 +00:00

mips-register-names.s

Add test cases for correct parsing of register names in 32- and 64-bit modes.

2012-10-11 12:42:49 +00:00

mips-relocations.s

Initial relocations test for the Mips standalone assembler.

2012-09-07 20:38:18 +00:00

multi-64bit-func.ll

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pr11877.s

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r-mips-got-disp.ll

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sext_64_32.ll

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sym-offset.ll

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