Venkatraman Govindaraju 9429f47d83 [Sparc] Add initial implementation of disassembler for sparc ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198591 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-06 08:08:58 +00:00
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AArch64	[AArch64][NEON] Added SXTL and SXTL2 instruction aliases	2014-01-03 19:20:31 +00:00
ARM	[arm] Add softvfp to supported FPU names.	2014-01-02 15:50:02 +00:00
AsmParser	Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.	2014-01-05 01:35:51 +00:00
COFF	Add the .secidx test I've forgotten to svn add in 197826	2013-12-20 19:06:50 +00:00
Disassembler	[Sparc] Add initial implementation of disassembler for sparc	2014-01-06 08:08:58 +00:00
ELF	Correct word hyphenations	2013-12-05 05:44:44 +00:00
MachO	Fixed a bug in getARMFixupKindMachOInfo() where three ARM fixup kinds	2013-12-13 22:46:54 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	Support for microMIPS load effective address.	2013-12-25 10:14:07 +00:00
PowerPC	Convert another llc -filetype=obj test.	2013-10-28 22:17:19 +00:00
Sparc	Add lit.local.cfg for MC/Sparc	2014-01-05 03:07:04 +00:00
SystemZ	[SystemZ] Add MC support for interlocked-access 1 instructions	2013-12-24 15:14:05 +00:00
X86	Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode	2014-01-06 06:02:58 +00:00