Jakob Stoklund Olesen 0d8ba3303b Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86 ... does for {flags}. If we create virtual registers of the CCR class, RegAllocFast may try to spill them, and we can't do that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106289 91177308-0d34-0410-b5e6-96231b3b80d8		2010-06-18 16:49:33 +00:00
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BugPoint
CodeGen	Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86	2010-06-18 16:49:33 +00:00
DebugInfo	Be specific. Use FileCheck.	2010-06-16 19:39:45 +00:00
ExecutionEngine
Feature
FrontendAda
FrontendC	Testcase for llvm-gcc 106225.	2010-06-17 17:43:14 +00:00
FrontendC++
FrontendFortran
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FrontendObjC++
Integer
lib
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LLVMC
MC	Add {mix,max}{ss,sd}{rr,rm} AVX forms.	2010-06-18 01:12:56 +00:00
Other	Don't write a file named "&1".	2010-06-18 01:49:17 +00:00
Scripts	tests: Run macho-dump with binary unbuffered streams on Windows, I can't find a Python 2.6 way to change stdin to binary.	2010-06-12 17:05:28 +00:00
TableGen	For a tablegen expression such as !if(a,b,c), let 'a'	2010-06-17 00:31:36 +00:00
Transforms	Disable indvars on loops when LoopSimplify form is not available.	2010-06-18 01:35:11 +00:00
Unit
Verifier
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
site.exp.in
TestRunner.sh