llvm-6502/test/CodeGen
Jakob Stoklund Olesen 0d8ba3303b Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast
may try to spill them, and we can't do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106289 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 16:49:33 +00:00
..
Alpha
ARM Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86 2010-06-18 16:49:33 +00:00
Blackfin
CBackend
CellSPU Fix SPU to cope with vector insertelement to an undef position. 2010-06-09 09:58:17 +00:00
CPP
Generic Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
MBlaze
Mips
MSP430
PIC16
PowerPC Remove the local register allocator. 2010-06-15 21:58:33 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
Thumb2 Remove arm_apcscc from the test files. It is the default and doing this 2010-06-17 15:18:27 +00:00
X86 Don't maintain a set of deleted nodes; instead, use a HandleSDNode 2010-06-18 01:24:29 +00:00
XCore