Hal Finkel 958b670c34 [PowerPC] Add support for the CMPB instruction ... Newer POWER cores, and the A2, support the cmpb instruction. This instruction compares its operands, treating each of the 8 bytes in the GPRs separately, returning a 'mask' result of 0 (for false) or -1 (for true) in each byte. Code generation support is added, in the form of a PPCISelDAGToDAG DAG-preprocessing routine, that recognizes patterns close to what the instruction computes (either exactly, or related by a constant masking operation), and generates the cmpb instruction (along with any necessary constant masking operation). This can be expanded if use cases arise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225106 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-03 01:16:37 +00:00
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lit.local.cfg	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
ppc64-encoding-4xx.txt	Update disassembler test to check the full dccci/iccci form.	2014-08-09 14:01:10 +00:00
ppc64-encoding-6xx.txt	Add PPC 603's tlbld and tlbli instructions.	2014-08-04 23:49:45 +00:00
ppc64-encoding-bookII.txt	[PowerPC] Add support for dcbtst and icbt (prefetch)	2014-08-23 23:21:04 +00:00
ppc64-encoding-bookIII.txt	Refactor TLBIVAX and add tlbsx.	2014-07-30 22:51:15 +00:00
ppc64-encoding-e500.txt	Add features for PPC 4xx and e500/e500mc instructions.	2014-08-04 15:47:38 +00:00
ppc64-encoding-ext.txt	[PowerPC] Add asm support for cache-inhibited ld/st instructions	2014-11-30 10:15:56 +00:00
ppc64-encoding-fp.txt
ppc64-encoding-vmx.txt
ppc64-encoding.txt	[PowerPC] Add support for the CMPB instruction	2015-01-03 01:16:37 +00:00
ppc64-operands.txt
vsx.txt