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llvm-6502/test/MC
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Tim Northover 54a1cf75d2 AArch64: remove post-encoder method from FCMP (immediate) instructions. 
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-28 14:46:14 +00:00
..
AArch64
ARM ARM: permit full range of valid ADR immediates. 2013-02-27 16:43:09 +00:00
AsmParser AsmParser: More generic support for integer type suffices. 2013-02-26 20:17:10 +00:00
COFF
Disassembler AArch64: remove post-encoder method from FCMP (immediate) instructions. 2013-02-28 14:46:14 +00:00
ELF
MachO Revert r15266. This fixes llvm.org/pr15266. 2013-02-14 16:23:08 +00:00
Markup
MBlaze
Mips Mips specific standalone assembler addressing mode %hi and %lo. 2013-02-21 02:09:31 +00:00
PowerPC
X86 [ms-inline asm] Add support for the pushad/popad mnemonics. 2013-02-25 19:06:27 +00:00