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https://github.com/c64scene-ar/llvm-6502.git
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e3e5fcab94
This is a 1-line patch (with a TODO for AVX because that will affect even more regression tests) that lets us substitute the appropriate 64-bit store for the float/double/int domains. It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and 0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice. Differential Revision: http://reviews.llvm.org/D8691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235014 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
724 B
LLVM
33 lines
724 B
LLVM
; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 | FileCheck %s
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; CHECK: load_store
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define void @load_store(<4 x i16>* %in) {
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entry:
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; CHECK: pmovzxwd
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%A27 = load <4 x i16>, <4 x i16>* %in, align 4
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%A28 = add <4 x i16> %A27, %A27
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; CHECK: movq
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store <4 x i16> %A28, <4 x i16>* %in, align 4
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ret void
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; CHECK: ret
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}
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; Make sure that we store a 64bit value, even on 32bit systems.
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;CHECK-LABEL: store_64:
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define void @store_64(<2 x i32>* %ptr) {
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BB:
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store <2 x i32> zeroinitializer, <2 x i32>* %ptr
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ret void
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;CHECK: movlps
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;CHECK: ret
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}
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;CHECK-LABEL: load_64:
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define <2 x i32> @load_64(<2 x i32>* %ptr) {
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BB:
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%t = load <2 x i32>, <2 x i32>* %ptr
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ret <2 x i32> %t
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;CHECK: pmovzxdq
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;CHECK: ret
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}
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