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7377cff9e7
On sandy bridge (PR17654) we now get vpxor %xmm1, %xmm1, %xmm1 vpunpckhbw %xmm1, %xmm0, %xmm2 vpunpcklbw %xmm1, %xmm0, %xmm0 vinsertf128 $1, %xmm2, %ymm0, %ymm0 On haswell it's a simple vpmovzxbw %xmm0, %ymm0 There is a maze of duplicated and dead transforms and patterns in this area. Remove the dead custom lowering of zext v8i16 to v8i32, that's already handled by LowerAVXExtend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193262 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
961 B
LLVM
42 lines
961 B
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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define <8 x i32> @zext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
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;CHECK-LABEL: zext_8i16_to_8i32:
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;CHECK: vpunpckhwd
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;CHECK: ret
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%B = zext <8 x i16> %A to <8 x i32>
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ret <8 x i32>%B
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}
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define <4 x i64> @zext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
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;CHECK-LABEL: zext_4i32_to_4i64:
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;CHECK: vpunpckhdq
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;CHECK: ret
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%B = zext <4 x i32> %A to <4 x i64>
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ret <4 x i64>%B
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}
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define <8 x i32> @zext_8i8_to_8i32(<8 x i8> %z) {
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;CHECK-LABEL: zext_8i8_to_8i32:
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;CHECK: vpunpckhwd
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;CHECK: vpmovzxwd
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;CHECK: vinsertf128
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;CHECK: ret
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%t = zext <8 x i8> %z to <8 x i32>
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ret <8 x i32> %t
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}
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; PR17654
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define <16 x i16> @zext_16i8_to_16i16(<16 x i8> %z) {
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; CHECK-LABEL: zext_16i8_to_16i16:
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; CHECK: vpxor
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; CHECK: vpunpckhbw
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; CHECK: vpunpcklbw
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; CHECK: vinsertf128
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; CHECK: ret
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%t = zext <16 x i8> %z to <16 x i16>
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ret <16 x i16> %t
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}
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