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a787066317
llvm-6502/lib/Target/R600
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Tom Stellard a787066317 R600/SI: Initial support for assembler and inline assembly 
This is currently considered experimental, but most of the more
commonly used instructions should work.

So far only SI has been extensively tested, CI and VI probably work too,
but may be buggy.  The current set of tests cases do not give complete
coverage, but I think it is sufficient for an experimental assembler.

See the documentation in R600Usage for more information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234381 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 01:09:26 +00:00
..
AsmParser R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
InstPrinter R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
MCTargetDesc Replace the MCSubtargetInfo parameter with a Triple when creating 2015-03-31 00:10:04 +00:00
TargetInfo
AMDGPU.h
AMDGPU.td R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAsmPrinter.cpp R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
AMDGPUAsmPrinter.h R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPUInstrInfo.h ArrayRefize memory operand folding. NFC. 2015-02-28 12:04:00 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset 2015-03-24 13:40:34 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32 2015-03-04 17:33:45 +00:00
AMDGPUISelDAGToDAG.cpp R600/SI: Custom-select 32-bit S_BFE from bitwise opcodes 2015-03-24 13:40:27 +00:00
AMDGPUISelLowering.cpp R600/SI: Expand fract to floor, then only select V_FRACT on CI 2015-03-24 13:40:08 +00:00
AMDGPUISelLowering.h
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the 2015-03-27 20:36:02 +00:00
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp Remove superfluous .str() and replace std::string concatenation with Twine. 2015-03-27 17:51:30 +00:00
AMDGPURegisterInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
AMDGPUSubtarget.h R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
AMDGPUTargetMachine.cpp Grab a subtarget off of an AMDGPUTargetMachine rather than a 2015-03-21 03:17:25 +00:00
AMDGPUTargetMachine.h Remove the target independent TargetMachine::getSubtarget and 2015-03-21 04:22:23 +00:00
AMDGPUTargetTransformInfo.cpp DataLayout is mandatory, update the API to reflect it with references. 2015-03-10 02:37:25 +00:00
AMDGPUTargetTransformInfo.h
AMDILCFGStructurizer.cpp CodeGen: Use the new DebugLoc API, NFC 2015-03-30 19:14:47 +00:00
AMDKernelCodeT.h
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt
EvergreenInstructions.td R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset 2015-03-24 13:40:34 +00:00
LLVMBuild.txt
Makefile
Processors.td R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
R600ClauseMergePass.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600InstrInfo.h
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp Fix typo in comment. 2015-03-25 22:34:16 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600RegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp
SIFixSGPRLiveRanges.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
SIFoldOperands.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
SIInsertWaits.cpp Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIInstrFormats.td R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SIInstrInfo.cpp R600/SI: Improve BFM support 2015-03-24 13:40:21 +00:00
SIInstrInfo.h R600/SI: Merge tables for commuting 2015-03-23 18:45:41 +00:00
SIInstrInfo.td R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SIInstructions.td R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SIIntrinsics.td
SIISelLowering.cpp R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SIISelLowering.h R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SILoadStoreOptimizer.cpp Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. 2015-03-23 19:32:43 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp
SIRegisterInfo.cpp R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI 2015-03-24 13:40:38 +00:00
SIRegisterInfo.h Remove the need to cache the subtarget in the R600 TargetRegisterInfo 2015-03-11 18:43:21 +00:00
SIRegisterInfo.td R600/SI: Initial support for assembler and inline assembly 2015-04-08 01:09:26 +00:00
SISchedule.td
SIShrinkInstructions.cpp Purge unused includes throughout libSupport. 2015-03-23 18:07:13 +00:00
SITypeRewriter.cpp Remove more superfluous .str() and replace std::string concatenation with Twine. 2015-03-30 15:42:36 +00:00
VIInstrFormats.td
VIInstructions.td