llvm-6502/test/CodeGen
Dale Johannesen a83bf35d16 Add a new transform to DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122355 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-21 20:10:51 +00:00
..
Alpha If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
ARM Add ARM-specific DAG combining to cast i64 vector element load/stores to f64. 2010-12-21 06:43:19 +00:00
Blackfin
CBackend
CellSPU Don't feed 19 bit immediates to ILA. 2010-12-17 09:36:09 +00:00
CPP
Generic temporarily disable this: PR8823. 2010-12-20 02:11:23 +00:00
MBlaze Lower the MBlaze target specific calling conventions for "interrupt_handler" 2010-12-15 20:27:28 +00:00
Mips Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka 2010-12-09 17:32:30 +00:00
MSP430 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
PowerPC Restore the behavior of frame lowering before my refactoring. 2010-12-18 19:53:14 +00:00
PTX ptx: add shift instructions 2010-12-06 04:00:03 +00:00
SPARC If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
SystemZ If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
Thumb Thumb1 had two patterns for the same load-from-constant-pool instruction. 2010-12-15 23:52:36 +00:00
Thumb2 Remove the rest of the *_sfp Neon instruction patterns. 2010-12-13 23:02:37 +00:00
X86 Add a new transform to DAGCombiner. 2010-12-21 20:10:51 +00:00
XCore If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
thumb2-mul.ll