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2eaf50f5fb
The asm syntax for the 32-bit rotate-and-mask instructions can take a 32-bit bitmask instead of an (mb, me) pair. This syntax is not specified in the Power ISA manual, but is accepted by GNU as, and is documented in IBM's Assembler Language Reference. The GNU Multiple Precision Arithmetic Library (gmp) contains assembly that uses this syntax. To implement this, I moved the isRunOfOnes utility function from PPCISelDAGToDAG.cpp to PPCMCTargetDesc.h. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233483 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| deprecated-p7.s | ||
| htm.s | ||
| lcomm.s | ||
| lit.local.cfg | ||
| ppc32-ba.s | ||
| ppc64-abiversion.s | ||
| ppc64-encoding-4xx.s | ||
| ppc64-encoding-6xx.s | ||
| ppc64-encoding-bookII.s | ||
| ppc64-encoding-bookIII.s | ||
| ppc64-encoding-e500.s | ||
| ppc64-encoding-ext.s | ||
| ppc64-encoding-fp.s | ||
| ppc64-encoding-spe.s | ||
| ppc64-encoding-vmx.s | ||
| ppc64-encoding.s | ||
| ppc64-errors.s | ||
| ppc64-fixup-apply.s | ||
| ppc64-fixup-explicit.s | ||
| ppc64-fixups.s | ||
| ppc64-initial-cfa.s | ||
| ppc64-localentry-error1.s | ||
| ppc64-localentry-error2.s | ||
| ppc64-localentry.s | ||
| ppc64-operands.s | ||
| ppc64-regs.s | ||
| ppc64-relocs-01.s | ||
| ppc64-tls-relocs-01.s | ||
| ppc-llong.s | ||
| ppc-machine.s | ||
| ppc-nop.s | ||
| ppc-reloc.s | ||
| ppc-word.s | ||
| qpx.s | ||
| tls-gd-obj.s | ||
| tls-ie-obj.s | ||
| tls-ld-obj.s | ||
| vsx.s | ||