llvm-6502/test/MC
Richard Sandiford d50bcb2162 [SystemZ] Register compare-and-branch support
This patch adds support for the CRJ and CGRJ instructions.  Support for
the immediate forms will be a separate patch.

The architecture has a large number of comparison instructions.  I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction.  The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-28 10:41:11 +00:00
..
AArch64
ARM Fix ARM FastISel tests, as a first step to enabling ARM FastISel 2013-05-14 16:26:38 +00:00
AsmParser
COFF
Disassembler [SystemZ] Register compare-and-branch support 2013-05-28 10:41:11 +00:00
ELF Add support for DWARF line number table entries for values in the instruction 2013-05-25 21:56:53 +00:00
MachO
Markup
MBlaze
Mips Mips assembler: Add TwoOperandConstraint definitions 2013-05-16 20:24:27 +00:00
PowerPC [PowerPC] Merge/rename PPC fixup types 2013-05-17 12:37:21 +00:00
SystemZ [SystemZ] Register compare-and-branch support 2013-05-28 10:41:11 +00:00
X86