llvm-6502/lib/CodeGen
Benjamin Kramer 15c435a367 Retire llvm::array_endof in favor of non-member std::end.
While there make array_lengthof constexpr if we have support for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206112 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-12 16:15:53 +00:00
..
AsmPrinter PR13337: Omit DW_TAG_restrict_type when compiling for DWARF2 2014-04-12 05:35:59 +00:00
SelectionDAG Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
AggressiveAntiDepBreaker.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
AggressiveAntiDepBreaker.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
AllocationOrder.cpp
AllocationOrder.h Check hint registers for interference only once before evictions 2013-12-05 21:18:40 +00:00
Analysis.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
AntiDepBreaker.h Revert "Give internal classes hidden visibility." 2013-09-11 18:05:11 +00:00
BasicTargetTransformInfo.cpp Account for scalarization costs in BasicTTI::getMemoryOpCost for extending vector loads 2014-04-03 00:53:59 +00:00
BranchFolding.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
BranchFolding.h Revert "Give internal classes hidden visibility." 2013-09-11 18:05:11 +00:00
CalcSpillWeights.cpp Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitable 2014-03-13 06:02:25 +00:00
CallingConvLower.cpp
CMakeLists.txt [CodeGenPrepare] Move CodeGenPrepare into lib/CodeGen. 2014-02-22 00:07:45 +00:00
CodeGen.cpp [CodeGenPrepare] Move CodeGenPrepare into lib/CodeGen. 2014-02-22 00:07:45 +00:00
CodeGenPrepare.cpp Add the ability to use GEPs for address sinking in CGP 2014-04-12 00:59:48 +00:00
CriticalAntiDepBreaker.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
CriticalAntiDepBreaker.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
DeadMachineInstructionElim.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
DFAPacketizer.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
DwarfEHPrepare.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
EarlyIfConversion.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
EdgeBundles.cpp
ErlangGC.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
ExecutionDepsFix.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
ExpandISelPseudos.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
ExpandPostRAPseudos.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
GCMetadata.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
GCMetadataPrinter.cpp
GCStrategy.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
IfConversion.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
InlineSpiller.cpp Register allocator: add condition to hoist a spill to outer loop. 2014-03-21 21:46:24 +00:00
InterferenceCache.cpp [C++11] Replace llvm::tie with std::tie. 2014-03-02 13:30:33 +00:00
InterferenceCache.h The following patch' purpose is to reduce compile time for compilation of small 2014-02-06 09:23:24 +00:00
IntrinsicLowering.cpp [Modules] Move CallSite into the IR library where it belogs. It is 2014-03-04 11:01:28 +00:00
JITCodeEmitter.cpp
LatencyPriorityQueue.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
LexicalScopes.cpp [Layering] Move DebugInfo.h into the IR library where its implementation 2014-03-06 00:46:21 +00:00
LiveDebugVariables.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
LiveDebugVariables.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
LiveInterval.cpp Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 2014-03-13 23:12:04 +00:00
LiveIntervalAnalysis.cpp Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitable 2014-03-13 06:02:25 +00:00
LiveIntervalUnion.cpp
LivePhysRegs.cpp Convert register liveness tracking to work on a sub-register level instead of just register units. 2013-12-14 06:52:56 +00:00
LiveRangeCalc.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
LiveRangeCalc.h LiveRangeCalc.h: Update a description corresponding to r192396. [-Wdocumentation] 2013-10-11 04:52:03 +00:00
LiveRangeEdit.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
LiveRegMatrix.cpp Replace OwningPtr<T> with std::unique_ptr<T>. 2014-03-06 05:51:42 +00:00
LiveStackAnalysis.cpp
LiveVariables.cpp
LLVMBuild.txt Prune redundant dependencies in LLVMBuild.txt. 2013-12-11 00:30:57 +00:00
LLVMTargetMachine.cpp DebugInfo: TargetOptions/MCAsmInfo support for compressed debug info sections 2014-03-27 20:45:41 +00:00
LocalStackSlotAllocation.cpp Simplify resolveFrameIndex() signature. 2014-04-02 19:28:18 +00:00
MachineBasicBlock.cpp Replace PROLOG_LABEL with a new CFI_INSTRUCTION. 2014-03-07 06:08:31 +00:00
MachineBlockFrequencyInfo.cpp blockfreq: Rename BlockFrequencyImpl to BlockFrequencyInfoImpl 2014-04-11 23:20:58 +00:00
MachineBlockPlacement.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineBranchProbabilityInfo.cpp blockfreq: Use const in MachineBlockFrequencyInfo 2014-03-25 18:01:32 +00:00
MachineCodeEmitter.cpp
MachineCopyPropagation.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineCSE.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineDominators.cpp
MachineFunction.cpp Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
MachineFunctionAnalysis.cpp
MachineFunctionPass.cpp [stackprotector] Use analysis from the StackProtector pass for stack layout in PEI a nd LocalStackSlot passes. 2013-12-19 03:17:11 +00:00
MachineFunctionPrinterPass.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
MachineInstr.cpp Remove some dead assignements found by scan-build 2014-03-21 21:54:46 +00:00
MachineInstrBundle.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
MachineLICM.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineLoopInfo.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
MachineModuleInfo.cpp MachineModuleInfo: Turn nested std::pairs into a proper struct. 2014-03-09 15:44:39 +00:00
MachineModuleInfoImpls.cpp
MachinePassRegistry.cpp
MachinePostDominators.cpp
MachineRegisterInfo.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
MachineScheduler.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineSink.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
MachineSSAUpdater.cpp remove a bunch of unused private methods 2014-03-23 17:09:26 +00:00
MachineTraceMetrics.cpp Retire llvm::array_endof in favor of non-member std::end. 2014-04-12 16:15:53 +00:00
MachineVerifier.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
Makefile
OcamlGC.cpp
OptimizePHIs.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
Passes.cpp Remove LowerInvoke's obsolete "-enable-correct-eh-support" option 2014-03-20 19:54:47 +00:00
PeepholeOptimizer.cpp [CodeGen] Fix peephole optimizer bug introduced in r205481. Fixes PR19318. 2014-04-03 05:03:20 +00:00
PHIElimination.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
PHIEliminationUtils.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
PHIEliminationUtils.h
PostRASchedulerList.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
ProcessImplicitDefs.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
PrologEpilogInserter.cpp Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
PrologEpilogInserter.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
PseudoSourceValue.cpp
README.txt
RegAllocBase.cpp Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitable 2014-03-13 06:02:25 +00:00
RegAllocBase.h Replace OwningPtr<T> with std::unique_ptr<T>. 2014-03-06 05:51:42 +00:00
RegAllocBasic.cpp Remove unused method. 2014-03-07 09:26:53 +00:00
RegAllocFast.cpp Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 2014-03-13 23:12:04 +00:00
RegAllocGreedy.cpp [RegAllocGreedy][Last Chance Recoloring] Change the name of the exhaustive search option. 2014-04-11 21:51:09 +00:00
RegAllocPBQP.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
RegisterClassInfo.cpp Make comment more explicit. 2013-12-17 02:18:02 +00:00
RegisterCoalescer.cpp [Register Coalescer] Fix wrong live-range information with rematerialization. 2014-04-11 19:45:07 +00:00
RegisterCoalescer.h
RegisterPressure.cpp Phase 1 of refactoring the MachineRegisterInfo iterators to make them suitable 2014-03-13 06:02:25 +00:00
RegisterScavenging.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
ScheduleDAG.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
ScheduleDAGInstrs.cpp Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
ScheduleDAGPrinter.cpp Put the functionality for printing a value to a raw_ostream as an 2014-01-09 02:29:41 +00:00
ScoreboardHazardRecognizer.cpp
ShadowStackGC.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
SjLjEHPrepare.cpp [C++11] Add range based accessors for the Use-Def chain of a Value. 2014-03-09 03:16:01 +00:00
SlotIndexes.cpp [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 2014-03-02 12:27:27 +00:00
Spiller.cpp Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 2014-03-13 23:12:04 +00:00
Spiller.h
SpillPlacement.cpp RegAlloc: Account for a variable entry block frequency 2014-04-08 19:18:56 +00:00
SpillPlacement.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
SplitKit.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
SplitKit.h Revert "Give internal classes hidden visibility." 2013-09-11 18:05:11 +00:00
StackColoring.cpp Implement depth_first and inverse_depth_first range factory functions. 2014-04-11 01:50:01 +00:00
StackMapLivenessAnalysis.cpp Minor change to StackMapLiveness DEBUG output. 2014-04-04 23:49:35 +00:00
StackMaps.cpp [Stackmaps] Update the stackmap format to use 64-bit relocations for the function address and properly align all entries. 2014-03-31 22:14:04 +00:00
StackProtector.cpp [C++11] Add range based accessors for the Use-Def chain of a Value. 2014-03-09 03:16:01 +00:00
StackSlotColoring.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
TailDuplication.cpp Disable each MachineFunctionPass for 'optnone' functions, unless that 2014-03-31 17:43:35 +00:00
TargetFrameLoweringImpl.cpp
TargetInstrInfo.cpp Replace PROLOG_LABEL with a new CFI_INSTRUCTION. 2014-03-07 06:08:31 +00:00
TargetLoweringBase.cpp Change shouldSplitVectorElementType to better match the description. 2014-03-31 20:54:58 +00:00
TargetLoweringObjectFileImpl.cpp WinCOFF: Emit common symbols as specified in the COFF spec 2014-04-08 22:33:40 +00:00
TargetOptionsImpl.cpp Re-sort all of the includes with ./utils/sort_includes.py so that 2014-01-07 11:48:04 +00:00
TargetRegisterInfo.cpp Make consistent use of MCPhysReg instead of uint16_t throughout the tree. 2014-04-04 05:16:06 +00:00
TargetSchedule.cpp IfConverter: Use TargetSchedule for instruction latencies 2013-09-30 15:28:56 +00:00
TwoAddressInstructionPass.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00
UnreachableBlockElim.cpp [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-07 09:26:03 +00:00
VirtRegMap.cpp Switch a number of loops in lib/CodeGen over to range-based for-loops, now that 2014-03-17 19:36:09 +00:00

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.