llvm-6502/test/MC
Johnny Chen a9611549fe Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong.
Also set the encoding bits (for A8.6.303, A8.6.328, A8.6.329) Inst{3-0} = 0b0000,
in class NVLaneOp.

rdar://problem/9240648


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-06 18:27:46 +00:00
..
ARM Constants with multiple encodings (ARM): 2011-04-05 18:02:46 +00:00
AsmParser Adding a test for "-inf" as well. 2011-03-29 21:54:10 +00:00
COFF Don't use PadSectionToAlignment on windows. 2010-12-06 03:03:44 +00:00
Disassembler Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. 2011-04-06 18:27:46 +00:00
ELF Write the section table and the section data in the same order that 2011-03-20 18:44:20 +00:00
MachO MC: Add support for disabling "temporary label" behavior. Useful for debugging 2011-03-28 22:49:15 +00:00
MBlaze Teach the MBlaze asm parser how to parse special purpose register names. 2010-12-20 20:43:24 +00:00
X86 Add support for the VIA PadLock instructions. 2011-04-04 16:58:13 +00:00