Jakob Stoklund Olesen a6035773d8 Add TRI::getSubRegIndexLaneMask(). ...

Sub-register lane masks are bitmasks that can be used to determine if
two sub-registers of a virtual register will overlap. For example, ARM's
ssub0 and ssub1 sub-register indices don't overlap each other, but both
overlap dsub0 and qsub0.

The lane masks will be accurate on most targets, but on targets that use
sub-register indexes in an irregular way, the masks may conservatively
report that two sub-register indices overlap when the eventually
allocated physregs don't.

Irregular register banks also mean that the bits in a lane mask can't be
mapped onto register units, but the concept is similar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163630 91177308-0d34-0410-b5e6-96231b3b80d8

2012-09-11 16:34:08 +00:00

..

AsmMatcherEmitter.cpp

Fix function name per coding standard.

2012-09-05 01:15:43 +00:00

AsmWriterEmitter.cpp

Clean up includes.

2012-07-27 06:44:02 +00:00

AsmWriterInst.cpp

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AsmWriterInst.h

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CallingConvEmitter.cpp

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CMakeLists.txt

I'm introducing a new machine model to simultaneously allow simple

2012-07-07 04:00:00 +00:00

CodeEmitterGen.cpp

Re-work bit/bits value resolving in tblgen

2012-09-06 23:32:48 +00:00

CodeGenDAGPatterns.cpp

Tablegen: Add OperandWithDefaultOps Operand type

2012-09-06 14:15:52 +00:00

CodeGenDAGPatterns.h

Tablegen: Add OperandWithDefaultOps Operand type

2012-09-06 14:15:52 +00:00

CodeGenInstruction.cpp

Heed guessInstructionProperties, and stop warning on redundant flags.

2012-08-24 00:31:16 +00:00

CodeGenInstruction.h

Heed guessInstructionProperties, and stop warning on redundant flags.

2012-08-24 00:31:16 +00:00

CodeGenIntrinsics.h

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CodeGenRegisters.cpp

Add TRI::getSubRegIndexLaneMask().

2012-09-11 16:34:08 +00:00

CodeGenRegisters.h

Add TRI::getSubRegIndexLaneMask().

2012-09-11 16:34:08 +00:00

CodeGenSchedule.cpp

I'm introducing a new machine model to simultaneously allow simple

2012-07-07 04:00:00 +00:00

CodeGenSchedule.h

I'm introducing a new machine model to simultaneously allow simple

2012-07-07 04:00:00 +00:00

CodeGenTarget.cpp

Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be

2012-09-06 09:17:37 +00:00

CodeGenTarget.h

Add CodeGenTarget::guessInstructionProperties.

2012-08-23 19:34:41 +00:00

DAGISelEmitter.cpp

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DAGISelMatcher.cpp

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DAGISelMatcher.h

Fix a typo (the the => the)

2012-07-23 08:51:15 +00:00

DAGISelMatcherEmitter.cpp

TblGen: Tweak to pretty-print DAGISel.inc a bit better.

2012-07-18 22:41:03 +00:00

DAGISelMatcherGen.cpp

Tablegen: Add OperandWithDefaultOps Operand type

2012-09-06 14:15:52 +00:00

DAGISelMatcherOpt.cpp

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DFAPacketizerEmitter.cpp

Refactored DFA generator. Merged transition class into state class.

2012-09-07 21:35:43 +00:00

DisassemblerEmitter.cpp

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EDEmitter.cpp

Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.

2012-07-18 04:11:12 +00:00

FastISelEmitter.cpp

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FixedLenDecoderEmitter.cpp

Re-work bit/bits value resolving in tblgen

2012-09-06 23:32:48 +00:00

InstrInfoEmitter.cpp

Add an MCID::Select flag and TII hooks for optimizing selects.

2012-08-16 23:11:47 +00:00

IntrinsicEmitter.cpp

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LLVMBuild.txt

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Makefile

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PseudoLoweringEmitter.cpp

Tablegen: Add OperandWithDefaultOps Operand type

2012-09-06 14:15:52 +00:00

RegisterInfoEmitter.cpp

Add TRI::getSubRegIndexLaneMask().

2012-09-11 16:34:08 +00:00

SequenceToOffsetTable.h

Fix a bunch of -Wdocumentation warnings.

2012-08-23 16:54:08 +00:00

SetTheory.cpp

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SetTheory.h

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StringToOffsetTable.h

Add some missing includes for the build against stdcxx.

2012-08-10 10:53:56 +00:00

SubtargetEmitter.cpp

Constify subtarget info properly so that we dont cast away the const in

2012-09-05 21:43:57 +00:00

TableGen.cpp

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TableGenBackends.h

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TGValueTypes.cpp

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X86DisassemblerShared.h

Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data.

2012-08-01 07:39:18 +00:00

X86DisassemblerTables.cpp

Change unsigned to a uint16_t in static disassembler tables to reduce the table size.

2012-09-11 04:19:21 +00:00

X86DisassemblerTables.h

Remove trailing whitespace

2012-07-31 05:28:41 +00:00

X86ModRMFilters.cpp

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X86ModRMFilters.h

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X86RecognizableInstr.cpp

Add support for converting llvm.fma to fma4 instructions.

2012-08-31 15:40:30 +00:00

X86RecognizableInstr.h

Fix a bunch of -Wdocumentation warnings.

2012-08-23 16:54:08 +00:00