mirror of
https://github.com/c64scene-ar/llvm-6502.git
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37bcda3de9
LegalizeTypes. Correct the load logic so that it actually works, and also teach it to handle floating point extending loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49923 91177308-0d34-0410-b5e6-96231b3b80d8
403 lines
17 KiB
C++
403 lines
17 KiB
C++
//===-- LegalizeTypes.h - Definition of the DAG Type Legalizer class ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the DAGTypeLegalizer class. This is a private interface
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// shared between the code that implements the SelectionDAG::LegalizeTypes
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// method.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SELECTIONDAG_LEGALIZETYPES_H
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#define SELECTIONDAG_LEGALIZETYPES_H
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#define DEBUG_TYPE "legalize-types"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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namespace llvm {
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//===----------------------------------------------------------------------===//
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/// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and
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/// hacks on it until the target machine can handle it. This involves
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/// eliminating value sizes the machine cannot handle (promoting small sizes to
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/// large sizes or splitting up large values into small values) as well as
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/// eliminating operations the machine cannot handle.
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///
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/// This code also does a small amount of optimization and recognition of idioms
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/// as part of its processing. For example, if a target does not support a
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/// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
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/// will attempt merge setcc and brc instructions into brcc's.
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///
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class VISIBILITY_HIDDEN DAGTypeLegalizer {
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TargetLowering &TLI;
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SelectionDAG &DAG;
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public:
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// NodeIDFlags - This pass uses the NodeID on the SDNodes to hold information
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// about the state of the node. The enum has all the values.
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enum NodeIDFlags {
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/// ReadyToProcess - All operands have been processed, so this node is ready
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/// to be handled.
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ReadyToProcess = 0,
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/// NewNode - This is a new node that was created in the process of
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/// legalizing some other node.
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NewNode = -1,
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/// Processed - This is a node that has already been processed.
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Processed = -2
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// 1+ - This is a node which has this many unlegalized operands.
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};
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private:
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enum LegalizeAction {
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Legal, // The target natively supports this type.
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Promote, // This type should be executed in a larger type.
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Expand, // This type should be split into two types of half the size.
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FloatToInt, // Convert a floating point type to an integer of the same size.
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Scalarize, // Replace this one-element vector type with its element type.
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Split // This vector type should be split into smaller vectors.
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};
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/// ValueTypeActions - This is a bitvector that contains two bits for each
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/// simple value type, where the two bits correspond to the LegalizeAction
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/// enum from TargetLowering. This can be queried with "getTypeAction(VT)".
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TargetLowering::ValueTypeActionImpl ValueTypeActions;
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/// getTypeAction - Return how we should legalize values of this type, either
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/// it is already legal, or we need to promote it to a larger integer type, or
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/// we need to expand it into multiple registers of a smaller integer type, or
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/// we need to scalarize a one-element vector type into the element type, or
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/// we need to split a vector type into smaller vector types.
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LegalizeAction getTypeAction(MVT::ValueType VT) const {
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switch (ValueTypeActions.getTypeAction(VT)) {
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default:
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assert(false && "Unknown legalize action!");
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case TargetLowering::Legal:
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return Legal;
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case TargetLowering::Promote:
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return Promote;
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case TargetLowering::Expand:
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// Expand can mean
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// 1) split scalar in half, 2) convert a float to an integer,
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// 3) scalarize a single-element vector, 4) split a vector in two.
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if (!MVT::isVector(VT)) {
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if (MVT::getSizeInBits(VT) ==
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MVT::getSizeInBits(TLI.getTypeToTransformTo(VT)))
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return FloatToInt;
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else
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return Expand;
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} else if (MVT::getVectorNumElements(VT) == 1) {
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return Scalarize;
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} else {
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return Split;
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}
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}
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}
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/// isTypeLegal - Return true if this type is legal on this target.
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bool isTypeLegal(MVT::ValueType VT) const {
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return ValueTypeActions.getTypeAction(VT) == TargetLowering::Legal;
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}
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/// PromotedNodes - For nodes that are below legal width, this map indicates
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/// what promoted value to use.
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DenseMap<SDOperand, SDOperand> PromotedNodes;
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/// ExpandedNodes - For nodes that need to be expanded this map indicates
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/// which operands are the expanded version of the input.
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DenseMap<SDOperand, std::pair<SDOperand, SDOperand> > ExpandedNodes;
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/// FloatToIntedNodes - For floating point nodes converted to integers of
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/// the same size, this map indicates the converted value to use.
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DenseMap<SDOperand, SDOperand> FloatToIntedNodes;
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/// ScalarizedNodes - For nodes that are <1 x ty>, this map indicates the
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/// scalar value of type 'ty' to use.
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DenseMap<SDOperand, SDOperand> ScalarizedNodes;
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/// SplitNodes - For nodes that need to be split this map indicates
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/// which operands are the expanded version of the input.
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DenseMap<SDOperand, std::pair<SDOperand, SDOperand> > SplitNodes;
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/// ReplacedNodes - For nodes that have been replaced with another,
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/// indicates the replacement node to use.
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DenseMap<SDOperand, SDOperand> ReplacedNodes;
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/// Worklist - This defines a worklist of nodes to process. In order to be
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/// pushed onto this worklist, all operands of a node must have already been
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/// processed.
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SmallVector<SDNode*, 128> Worklist;
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public:
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explicit DAGTypeLegalizer(SelectionDAG &dag)
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: TLI(dag.getTargetLoweringInfo()), DAG(dag),
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ValueTypeActions(TLI.getValueTypeActions()) {
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assert(MVT::LAST_VALUETYPE <= 32 &&
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"Too many value types for ValueTypeActions to hold!");
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}
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void run();
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/// ReanalyzeNode - Recompute the NodeID and correct processed operands
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/// for the specified node, adding it to the worklist if ready.
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void ReanalyzeNode(SDNode *N) {
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N->setNodeId(NewNode);
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AnalyzeNewNode(N);
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}
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private:
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void AnalyzeNewNode(SDNode *&N);
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void ReplaceValueWith(SDOperand From, SDOperand To);
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void ReplaceNodeWith(SDNode *From, SDNode *To);
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void RemapNode(SDOperand &N);
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// Common routines.
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SDOperand BitConvertToInteger(SDOperand Op);
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SDOperand CreateStackStoreLoad(SDOperand Op, MVT::ValueType DestVT);
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SDOperand JoinIntegers(SDOperand Lo, SDOperand Hi);
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void SplitInteger(SDOperand Op, SDOperand &Lo, SDOperand &Hi);
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void SplitInteger(SDOperand Op, MVT::ValueType LoVT, MVT::ValueType HiVT,
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SDOperand &Lo, SDOperand &Hi);
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SDOperand MakeLibCall(RTLIB::Libcall LC, MVT::ValueType RetVT,
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const SDOperand *Ops, unsigned NumOps, bool isSigned);
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//===--------------------------------------------------------------------===//
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// Promotion Support: LegalizeTypesPromote.cpp
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//===--------------------------------------------------------------------===//
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SDOperand GetPromotedOp(SDOperand Op) {
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SDOperand &PromotedOp = PromotedNodes[Op];
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RemapNode(PromotedOp);
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assert(PromotedOp.Val && "Operand wasn't promoted?");
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return PromotedOp;
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}
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void SetPromotedOp(SDOperand Op, SDOperand Result);
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/// GetPromotedZExtOp - Get a promoted operand and zero extend it to the final
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/// size.
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SDOperand GetPromotedZExtOp(SDOperand Op) {
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MVT::ValueType OldVT = Op.getValueType();
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Op = GetPromotedOp(Op);
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return DAG.getZeroExtendInReg(Op, OldVT);
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}
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// Result Promotion.
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void PromoteResult(SDNode *N, unsigned ResNo);
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SDOperand PromoteResult_BIT_CONVERT(SDNode *N);
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SDOperand PromoteResult_BUILD_PAIR(SDNode *N);
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SDOperand PromoteResult_Constant(SDNode *N);
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SDOperand PromoteResult_CTLZ(SDNode *N);
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SDOperand PromoteResult_CTPOP(SDNode *N);
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SDOperand PromoteResult_CTTZ(SDNode *N);
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SDOperand PromoteResult_EXTRACT_VECTOR_ELT(SDNode *N);
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SDOperand PromoteResult_FP_ROUND(SDNode *N);
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SDOperand PromoteResult_FP_TO_XINT(SDNode *N);
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SDOperand PromoteResult_INT_EXTEND(SDNode *N);
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SDOperand PromoteResult_LOAD(LoadSDNode *N);
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SDOperand PromoteResult_SDIV(SDNode *N);
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SDOperand PromoteResult_SELECT (SDNode *N);
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SDOperand PromoteResult_SELECT_CC(SDNode *N);
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SDOperand PromoteResult_SETCC(SDNode *N);
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SDOperand PromoteResult_SHL(SDNode *N);
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SDOperand PromoteResult_SimpleIntBinOp(SDNode *N);
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SDOperand PromoteResult_SRA(SDNode *N);
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SDOperand PromoteResult_SRL(SDNode *N);
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SDOperand PromoteResult_TRUNCATE(SDNode *N);
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SDOperand PromoteResult_UDIV(SDNode *N);
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SDOperand PromoteResult_UNDEF(SDNode *N);
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// Operand Promotion.
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bool PromoteOperand(SDNode *N, unsigned OperandNo);
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SDOperand PromoteOperand_ANY_EXTEND(SDNode *N);
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SDOperand PromoteOperand_BUILD_PAIR(SDNode *N);
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SDOperand PromoteOperand_BR_CC(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_BRCOND(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_BUILD_VECTOR(SDNode *N);
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SDOperand PromoteOperand_FP_EXTEND(SDNode *N);
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SDOperand PromoteOperand_FP_ROUND(SDNode *N);
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SDOperand PromoteOperand_INT_TO_FP(SDNode *N);
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SDOperand PromoteOperand_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_MEMBARRIER(SDNode *N);
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SDOperand PromoteOperand_RET(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_SELECT(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_SETCC(SDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_SIGN_EXTEND(SDNode *N);
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SDOperand PromoteOperand_STORE(StoreSDNode *N, unsigned OpNo);
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SDOperand PromoteOperand_TRUNCATE(SDNode *N);
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SDOperand PromoteOperand_ZERO_EXTEND(SDNode *N);
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void PromoteSetCCOperands(SDOperand &LHS,SDOperand &RHS, ISD::CondCode Code);
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//===--------------------------------------------------------------------===//
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// Expansion Support: LegalizeTypesExpand.cpp
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//===--------------------------------------------------------------------===//
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void GetExpandedOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi);
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void SetExpandedOp(SDOperand Op, SDOperand Lo, SDOperand Hi);
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// Result Expansion.
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void ExpandResult(SDNode *N, unsigned ResNo);
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void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_BUILD_PAIR (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_Constant (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_CTLZ (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_CTPOP (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_CTTZ (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_EXTRACT_VECTOR_ELT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_MERGE_VALUES(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_UNDEF (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_FP_TO_SINT (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_FP_TO_UINT (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_Logical (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_BSWAP (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_ADDSUB (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_ADDSUBC (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_ADDSUBE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SELECT (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SELECT_CC (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_MUL (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SDIV (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SREM (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_UDIV (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_UREM (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_Shift (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandShiftByConstant(SDNode *N, unsigned Amt,
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SDOperand &Lo, SDOperand &Hi);
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bool ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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// Operand Expansion.
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bool ExpandOperand(SDNode *N, unsigned OperandNo);
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SDOperand ExpandOperand_BIT_CONVERT(SDNode *N);
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SDOperand ExpandOperand_BR_CC(SDNode *N);
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SDOperand ExpandOperand_BUILD_VECTOR(SDNode *N);
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SDOperand ExpandOperand_EXTRACT_ELEMENT(SDNode *N);
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SDOperand ExpandOperand_SETCC(SDNode *N);
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SDOperand ExpandOperand_SINT_TO_FP(SDOperand Source, MVT::ValueType DestTy);
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SDOperand ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo);
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SDOperand ExpandOperand_TRUNCATE(SDNode *N);
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SDOperand ExpandOperand_UINT_TO_FP(SDOperand Source, MVT::ValueType DestTy);
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void ExpandSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
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ISD::CondCode &CCCode);
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//===--------------------------------------------------------------------===//
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// Float to Integer Conversion Support: LegalizeTypesFloatToInt.cpp
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//===--------------------------------------------------------------------===//
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SDOperand GetIntegerOp(SDOperand Op) {
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SDOperand &IntegerOp = FloatToIntedNodes[Op];
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RemapNode(IntegerOp);
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assert(IntegerOp.Val && "Operand wasn't converted to integer?");
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return IntegerOp;
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}
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void SetIntegerOp(SDOperand Op, SDOperand Result);
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// Result Float to Integer Conversion.
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void FloatToIntResult(SDNode *N, unsigned OpNo);
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SDOperand FloatToIntRes_BIT_CONVERT(SDNode *N);
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SDOperand FloatToIntRes_BUILD_PAIR(SDNode *N);
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SDOperand FloatToIntRes_ConstantFP(ConstantFPSDNode *N);
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SDOperand FloatToIntRes_FADD(SDNode *N);
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SDOperand FloatToIntRes_FCOPYSIGN(SDNode *N);
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SDOperand FloatToIntRes_FMUL(SDNode *N);
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SDOperand FloatToIntRes_FSUB(SDNode *N);
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SDOperand FloatToIntRes_LOAD(SDNode *N);
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SDOperand FloatToIntRes_XINT_TO_FP(SDNode *N);
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// Operand Float to Integer Conversion.
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bool FloatToIntOperand(SDNode *N, unsigned OpNo);
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SDOperand FloatToIntOp_BIT_CONVERT(SDNode *N);
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//===--------------------------------------------------------------------===//
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// Scalarization Support: LegalizeTypesScalarize.cpp
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//===--------------------------------------------------------------------===//
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SDOperand GetScalarizedOp(SDOperand Op) {
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SDOperand &ScalarOp = ScalarizedNodes[Op];
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RemapNode(ScalarOp);
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assert(ScalarOp.Val && "Operand wasn't scalarized?");
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return ScalarOp;
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}
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void SetScalarizedOp(SDOperand Op, SDOperand Result);
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// Result Vector Scalarization: <1 x ty> -> ty.
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void ScalarizeResult(SDNode *N, unsigned OpNo);
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SDOperand ScalarizeRes_BinOp(SDNode *N);
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SDOperand ScalarizeRes_UnaryOp(SDNode *N);
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SDOperand ScalarizeRes_BIT_CONVERT(SDNode *N);
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SDOperand ScalarizeRes_FPOWI(SDNode *N);
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SDOperand ScalarizeRes_INSERT_VECTOR_ELT(SDNode *N);
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SDOperand ScalarizeRes_LOAD(LoadSDNode *N);
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SDOperand ScalarizeRes_SELECT(SDNode *N);
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SDOperand ScalarizeRes_UNDEF(SDNode *N);
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SDOperand ScalarizeRes_VECTOR_SHUFFLE(SDNode *N);
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// Operand Vector Scalarization: <1 x ty> -> ty.
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bool ScalarizeOperand(SDNode *N, unsigned OpNo);
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SDOperand ScalarizeOp_BIT_CONVERT(SDNode *N);
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SDOperand ScalarizeOp_EXTRACT_VECTOR_ELT(SDNode *N);
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SDOperand ScalarizeOp_STORE(StoreSDNode *N, unsigned OpNo);
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//===--------------------------------------------------------------------===//
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// Vector Splitting Support: LegalizeTypesSplit.cpp
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//===--------------------------------------------------------------------===//
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void GetSplitOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi);
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void SetSplitOp(SDOperand Op, SDOperand Lo, SDOperand Hi);
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// Result Vector Splitting: <128 x ty> -> 2 x <64 x ty>.
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void SplitResult(SDNode *N, unsigned OpNo);
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void SplitRes_UNDEF(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_LOAD(LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_BUILD_PAIR(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_INSERT_VECTOR_ELT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_VECTOR_SHUFFLE(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_BUILD_VECTOR(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_CONCAT_VECTORS(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_UnOp(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_BinOp(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_FPOWI(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void SplitRes_SELECT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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// Operand Vector Splitting: <128 x ty> -> 2 x <64 x ty>.
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bool SplitOperand(SDNode *N, unsigned OpNo);
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SDOperand SplitOp_BIT_CONVERT(SDNode *N);
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SDOperand SplitOp_EXTRACT_SUBVECTOR(SDNode *N);
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SDOperand SplitOp_EXTRACT_VECTOR_ELT(SDNode *N);
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SDOperand SplitOp_RET(SDNode *N, unsigned OpNo);
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SDOperand SplitOp_STORE(StoreSDNode *N, unsigned OpNo);
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SDOperand SplitOp_VECTOR_SHUFFLE(SDNode *N, unsigned OpNo);
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public:
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void SanityCheck(SDNode *N);
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};
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} // end namespace llvm.
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#endif
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