llvm-6502/test/CodeGen/ARM64
Quentin Colombet 28a24ca471 [ARM64] Fix the information we give to the peephole optimizer for comparison.
ANDS does not use the same encoding scheme as other xxxS instructions (e.g.,
ADDS). Take that into account to avoid wrong peephole optimization.

<rdar://problem/16693089>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207020 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-23 20:43:38 +00:00
..
2011-03-09-CPSRSpill.ll
2011-03-17-AsmPrinterCrash.ll
2011-03-21-Unaligned-Frame-Index.ll
2011-04-21-CPSRBug.ll
2011-10-18-LdStOptBug.ll
2012-01-11-ComparisonDAGCrash.ll
2012-05-07-DAGCombineVectorExtract.ll
2012-05-07-MemcpyAlignBug.ll
2012-05-09-LOADgot-bug.ll
2012-05-22-LdStOptBug.ll
2012-06-06-FPToUI.ll
2012-07-11-InstrEmitterBug.ll
2013-01-13-ffast-fcmp.ll
2013-01-23-frem-crash.ll
2013-01-23-sext-crash.ll
2013-02-12-shufv8i8.ll
2014-04-16-AnInfiniteLoopInDAGCombine.ll Fix an infinite loop bug in DAG Combine about keeping transfering between ANY_EXTEND and SIGN_EXTEND. 2014-04-22 09:57:06 +00:00
aapcs.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
aarch64-large-frame.ll AArch64/ARM64: more testing from AArch64 to ARM64 2014-04-22 12:45:47 +00:00
aarch64-neon-2velem-high.ll
aarch64-neon-2velem.ll
aarch64-neon-3vdiff.ll
aarch64-neon-aba-abd.ll
aarch64-neon-across.ll
aarch64-neon-add-pairwise.ll
aarch64-neon-add-sub.ll
aarch64-neon-copy.ll AArch64/ARM64: spot a greater variety of concat_vector operations. 2014-04-18 09:31:27 +00:00
aarch64-neon-copyPhysReg-tuple.ll AArch64/ARM64: improve spotting of EXT instructions from VECTOR_SHUFFLE. 2014-04-18 12:50:58 +00:00
aarch64-neon-mul-div.ll AArch64/ARM64: port more AArch64 tests to ARM64. 2014-04-18 13:16:55 +00:00
aarch64-neon-scalar-by-elem-mul.ll AArch64/ARM64: mark fmul intrinsic as commutative. 2014-04-22 10:10:14 +00:00
aarch64-neon-simd-ldst-one.ll AArch64/ARM64: add more NEON tests. 2014-04-18 14:54:53 +00:00
aarch64-neon-simd-shift.ll AArch64/ARM64: add extra testing from AArch64 to ARM64 2014-04-22 12:45:32 +00:00
aarch64-neon-simd-vget.ll AArch64/ARM64: add extra testing from AArch64 to ARM64 2014-04-22 12:45:32 +00:00
aarch64-neon-vector-list-spill.ll AArch64/ARM64: add extra testing from AArch64 to ARM64 2014-04-22 12:45:32 +00:00
abi_align.ll
abi-varargs.ll
abi.ll
addp.ll
addr-mode-folding.ll
addr-type-promotion.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
addrmode.ll
AdvSIMD-Scalar.ll
alloc-no-stack-realign.ll
alloca-frame-pointer-offset.ll
andCmpBrToTBZ.ll
ands-bad-peephole.ll [ARM64] Fix the information we give to the peephole optimizer for comparison. 2014-04-23 20:43:38 +00:00
anyregcc-crash.ll
anyregcc.ll
arith-saturating.ll
arith.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
arm64-dead-def-elimination-flag.ll
atomic-128.ll
atomic.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
basic-pic.ll
big-imm-offsets.ll
big-stack.ll
bitfield-extract.ll [CodeGenPrepare] Use APInt to check the value of the immediate in a and 2014-04-22 01:20:34 +00:00
blockaddress.ll
build-vector.ll
call-tailcalls.ll
cast-opt.ll
ccmp-heuristics.ll
ccmp.ll
clrsb.ll
coalesce-ext.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
code-model-large-abs.ll
collect-loh-garbage-crash.ll
collect-loh-str.ll
collect-loh.ll ARM64: disable generation of .loh directives outside MachO. 2014-04-18 14:54:46 +00:00
compact-unwind-unhandled-cfi.S
complex-copy-noneon.ll [ARM64] Enable feature predicates for NEON / FP / CRYPTO. 2014-04-23 06:22:48 +00:00
complex-ret.ll
const-addr.ll
convert-v2f64-v2i32.ll
convert-v2i32-v2f64.ll
copy-tuple.ll
crc32.ll
crypto.ll [ARM64] Enable feature predicates for NEON / FP / CRYPTO. 2014-04-23 06:22:48 +00:00
cse.ll
csel.ll
cvt.ll
dagcombiner-convergence.ll
dagcombiner-indexed-load.ll
dagcombiner-load-slicing.ll
dead-def-frame-index.ll
dead-register-def-bug.ll
dup.ll ARM64: implement cunning optimisation from AArch64 2014-04-18 09:31:20 +00:00
early-ifcvt.ll
elf-calls.ll
elf-constpool.ll
elf-globals.ll
ext.ll
extend-int-to-fp.ll
extend.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
extern-weak.ll
extload-knownzero.ll
extract_subvector.ll
extract.ll
fast-isel-addr-offset.ll
fast-isel-alloca.ll
fast-isel-br.ll
fast-isel-call.ll
fast-isel-conversion.ll
fast-isel-fcmp.ll
fast-isel-gv.ll
fast-isel-icmp.ll
fast-isel-indirectbr.ll
fast-isel-intrinsic.ll
fast-isel-materialize.ll
fast-isel-noconvert.ll
fast-isel-rem.ll
fast-isel-ret.ll
fast-isel-select.ll
fast-isel.ll
fastcc-tailcall.ll
fastisel-gep-promote-before-add.ll
fcmp-opt.ll
fcopysign.ll
fixed-point-scalar-cvt-dagcombine.ll
fmadd.ll
fmax.ll
fminv.ll
fmuladd.ll
fold-address.ll
fold-lsl.ll
fp128-folding.ll
fp128.ll AArch64/ARM64: make use of ANDS and BICS instructions for comparisons. 2014-04-22 12:45:42 +00:00
fp-imm.ll
fp.ll
frame-index.ll
frameaddr.ll
global-address.ll
hello.ll
i16-subreg-extract.ll
icmp-opt.ll
illegal-float-ops.ll
indexed-memory.ll
inline-asm-error-I.ll
inline-asm-error-J.ll
inline-asm-error-K.ll
inline-asm-error-L.ll
inline-asm-error-M.ll
inline-asm-error-N.ll
inline-asm-zero-reg-error.ll
inline-asm.ll
join-reserved.ll
jumptable.ll
ld1.ll
ldp.ll
ldur.ll
ldxr-stxr.ll
leaf-compact-unwind.ll
leaf.ll
lit.local.cfg
long-shift.ll
memcpy-inline.ll
memset-inline.ll
memset-to-bzero.ll
misched-basic-A53.ll [ARM64] Ports the Cortex-A53 Machine Model description from AArch64. 2014-04-18 21:22:04 +00:00
movi.ll
mul.ll
neg.ll
neon-compare-instructions.ll
neon-v1i1-setcc.ll
patchpoint.ll
platform-reg.ll
popcnt.ll
prefetch.ll
promote-const.ll
redzone.ll
reg-copy-noneon.ll [ARM64] Enable feature predicates for NEON / FP / CRYPTO. 2014-04-23 06:22:48 +00:00
register-offset-addressing.ll
register-pairing.ll
regress-f128csel-flags.ll
regress-interphase-shift.ll
return-vector.ll
returnaddr.ll
rev.ll
rounding.ll
SafeDivRemIntrinsics-Opts.ll Reapply r206732. This time without optimization of branches. 2014-04-21 12:01:33 +00:00
SafeDivRemIntrinsics.ll Reapply r206732. This time without optimization of branches. 2014-04-21 12:01:33 +00:00
scaled_iv.ll
scvt.ll
shifted-sext.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
simd-scalar-to-vector.ll
simplest-elf.ll
sincos.ll
sitofp-combine-chains.ll
sli-sri-opt.ll
smaxv.ll
sminv.ll
spill-lr.ll
spill.ll
st1.ll
stack-no-frame.ll
stackmap.ll
stacksave.ll
stp.ll
strict-align.ll
stur.ll
subsections.ll ARM64: don't emit .subsections_via_symbols on ELF. 2014-04-18 14:54:41 +00:00
subvector-extend.ll
swizzle-tbl-i16-layout.ll
tbl.ll
this-return.ll
tls-darwin.ll
tls-dynamic-together.ll
tls-dynamics.ll
tls-execs.ll
trap.ll
trn.ll
trunc-store.ll ARM64: [su]xtw use W regs as inputs, not X regs. 2014-04-17 20:47:31 +00:00
umaxv.ll
uminv.ll
umov.ll
unaligned_ldst.ll
uzp.ll
vaargs.ll
vabs.ll
vadd.ll
vaddlv.ll
vaddv.ll
variadic-aapcs.ll
vbitwise.ll
vclz.ll
vcmp.ll
vcnt.ll
vcombine.ll
vcvt_f32_su32.ll
vcvt_f.ll
vcvt_n.ll
vcvt_su32_f32.ll
vcvt.ll
vcvtxd_f32_f64.ll
vecCmpBr.ll
vecFold.ll
vector-ext.ll
vector-imm.ll
vector-insertion.ll Make test/CodeGen/ARM64/vector-insertion.ll explicitly select neon syntax 2014-04-17 21:32:41 +00:00
vector-ldst.ll
vext.ll
vfloatintrinsics.ll
vhadd.ll
vhsub.ll
virtual_base.ll
vmax.ll
vminmaxnm.ll
vmovn.ll
vmul.ll
volatile.ll
vpopcnt.ll
vqadd.ll
vqsub.ll
vselect.ll Fix an infinite loop bug in DAG Combine about keeping transfering between ANY_EXTEND and SIGN_EXTEND. 2014-04-22 09:57:06 +00:00
vsetcc_fp.ll
vshift.ll ARM64: add extra NEG pattern. 2014-04-18 14:54:35 +00:00
vshr.ll
vshuffle.ll
vsqrt.ll
vsra.ll
vsub.ll
weak-reference.ll
xaluo.ll
zero-cycle-regmov.ll
zero-cycle-zeroing.ll
zext.ll
zextload-unscaled.ll
zip.ll