llvm-6502/test/CodeGen
Richard Sandiford acb31a245c Handle masked rotate amounts
At the moment we expect rotates to have the form:

   (or (shl X, Y), (shr X, Z))

where Y == bitsize(X) - Z or Z == bitsize(X) - Y.  This form means that
the (or ...) is undefined for Y == 0 or Z == 0.  This undefinedness can
be avoided by using Y == (C * bitsize(X) - Z) & (bitsize(X) - 1) or
Z == (C * bitsize(X) - Y) & (bitsize(X) - 1) for any integer C
(including 0, the most natural choice).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-09 10:56:42 +00:00
..
AArch64 Teach the DAGCombiner how to fold 'vselect' dag nodes according 2014-01-08 18:33:04 +00:00
ARM ARM IAS: improve .eabi_attribute handling 2014-01-07 02:28:42 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Remove a failing test to get the buildbots back to green. 2014-01-06 00:43:09 +00:00
Hexagon
Inputs
Mips [Mips] Does not take in account 'use-soft-float' attribute's value when 2013-12-25 17:00:27 +00:00
MSP430
NVPTX
PowerPC Implement initial-exec TLS for PPC32. 2013-12-20 18:08:54 +00:00
R600 R600: Allow ftrunc 2013-12-20 05:11:55 +00:00
SPARC [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64. 2014-01-04 07:17:21 +00:00
SystemZ Handle masked rotate amounts 2014-01-09 10:56:42 +00:00
Thumb Correctly handle the degenerated triple "thumb". 2013-12-18 21:29:44 +00:00
Thumb2
X86 llvm.experimental.stackmap: fix encoding of large constants. 2014-01-09 00:22:31 +00:00
XCore XCore Target: correct callee save register spilling when callsUnwindInit is true. 2014-01-06 14:21:12 +00:00