Tim Northover acfb679618 ARM64: add patterns for more lane-wise ld1/st1 operations. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205294 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-01 10:37:09 +00:00

..

AArch64

[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS

2014-03-27 16:28:09 +00:00

ARM

DebugInfo: Avoid creating unnecessary/empty line tables and remove the special case of '0' in DwarfCompileUnit::initStmtList by just always using a label difference

2014-04-01 08:07:52 +00:00

ARM64

ARM64: add patterns for more lane-wise ld1/st1 operations.

2014-04-01 10:37:09 +00:00

CPP

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Generic

CommandLine: Exit successfully for -version and -help

2014-02-28 19:08:01 +00:00

Hexagon

Fix broken CHECK lines

2014-02-16 07:31:05 +00:00

Inputs

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Mips

Fixed issue with microMIPS JAL instruction.

2014-03-31 14:00:10 +00:00

MSP430

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NVPTX

Fix for PR19099 - NVPTX produces invalid symbol names.

2014-03-31 15:56:26 +00:00

PowerPC

[PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shuffles

2014-03-31 17:48:16 +00:00

R600

R600: Compute masked bits for min and max

2014-03-31 19:35:33 +00:00

SPARC

Remove the linker_private and linker_private_weak linkages.

2014-03-13 23:18:37 +00:00

SystemZ

[SystemZ] Add support for z196 float<->unsigned conversions

2014-03-21 10:56:30 +00:00

Thumb

Add triples to try to fix the windows bots.

2014-02-13 16:49:47 +00:00

Thumb2

ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block

2014-02-26 11:27:28 +00:00

X86

[x86] Do not convert to cmp32 for Atom arch by Sergey Okunev

2014-04-01 08:13:07 +00:00

XCore

[XCore] Add support for the "m" inline asm constraint.

2014-03-06 16:37:48 +00:00