llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-10 20:33:15 +00:00

History

Chris Lattner ad25d4e2df Fix the (zext (zextload)) case to trigger, similarly for sign extends.

Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).

This compiles
short %foo() {
        %tmp.0 = load ubyte* %X         ; <ubyte> [#uses=1]
        %tmp.3 = cast ubyte %tmp.0 to short             ; <short> [#uses=1]
        ret short %tmp.3
}

to:
_foo:
        movzbl _X, %eax
        ret

instead of:

_foo:
        movzbl _X, %eax
        movzbl %al, %eax
        ret

thanks to Evan for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24709 91177308-0d34-0410-b5e6-96231b3b80d8

2005-12-14 19:05:06 +00:00

DAGCombiner.cpp

Fix the (zext (zextload)) case to trigger, similarly for sign extends.

2005-12-14 19:05:06 +00:00

LegalizeDAG.cpp

Lowering constant pool entries on ppc exposed a bug in the recently added

2005-12-13 03:03:23 +00:00

Makefile

…

ScheduleDAG.cpp

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00