Evan Cheng 8b944d39b3 Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code. ... e.g. orl $65536, 8(%rax) => orb $1, 10(%rax) Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8		2009-05-28 00:35:15 +00:00
..
DarwinTargetAsmInfo.h
ELFTargetAsmInfo.h	Do not propagate ELF-specific stuff (data.rel) into other targets. This simplifies code and also ensures correctness.	2009-03-30 15:27:43 +00:00
SubtargetFeature.h	Propagate CPU string out of SubtargetFeatures	2009-05-23 19:50:50 +00:00
Target.td	Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize	2009-04-13 21:06:25 +00:00
TargetAsmInfo.h	Add directive to declare external globals.	2009-04-29 08:23:18 +00:00
TargetCallingConv.td	Use CallConvLower.h and TableGen descriptions of the calling conventions	2009-04-17 19:07:39 +00:00
TargetData.h	Clarify a comment.	2009-05-12 17:08:34 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h	Add new TargetInstrDesc::hasImplicitUseOfPhysReg and	2009-04-12 07:26:51 +00:00
TargetInstrInfo.h	Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.	2009-05-05 00:30:09 +00:00
TargetInstrItineraries.h
TargetIntrinsicInfo.h	Added support to have TableGen provide information if an intrinsic (core	2009-02-24 23:17:49 +00:00
TargetJITInfo.h	Fix doxygen comment syntax.	2009-04-15 01:44:07 +00:00
TargetLowering.h	Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.	2009-05-28 00:35:15 +00:00
TargetMachine.h	Remove unused flags.	2009-04-30 00:57:51 +00:00
TargetMachineRegistry.h	Registry.h should not depend on CommandLine.h.	2009-01-16 07:02:28 +00:00
TargetMachOWriterInfo.h
TargetOptions.h	Correct comment.	2009-04-29 00:09:22 +00:00
TargetRegisterInfo.h	In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.	2009-05-03 18:32:42 +00:00
TargetSchedule.td
TargetSelectionDAG.td	2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.	2009-04-27 18:41:29 +00:00
TargetSubtarget.h