Andrew Trick ae692f2bae misched: Infrastructure for weak DAG edges. ... This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167738 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-12 19:28:57 +00:00
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ARM	misched: Infrastructure for weak DAG edges.	2012-11-12 19:28:57 +00:00
CellSPU
CPP
Generic
Hexagon
MBlaze
Mips	[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.	2012-11-07 19:10:58 +00:00
MSP430	Fix fallout from RegInfo => FrameLowering refactoring on MSP430.	2012-10-17 17:37:11 +00:00
NVPTX	[NVPTX] Add more precise PTX/SM target attributes	2012-11-12 03:16:43 +00:00
PowerPC	Fix assertions in updateRegMaskSlots().	2012-11-09 19:18:49 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Convert an improper CodeGen test to a MC test.	2012-11-10 04:30:40 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	Fix PR14314	2012-11-12 06:49:17 +00:00
XCore