llvm-6502/lib/Target/MSP430
Rafael Espindola 9472fd7403 Refactor the setting of PrivateGlobalPrefix.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-02 23:39:26 +00:00
..
InstPrinter [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 2013-11-28 17:04:04 +00:00
MCTargetDesc Refactor the setting of PrivateGlobalPrefix. 2013-12-02 23:39:26 +00:00
TargetInfo [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 2013-11-28 17:04:04 +00:00
CMakeLists.txt [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too. 2013-11-28 17:04:31 +00:00
LLVMBuild.txt
Makefile
MSP430.h
MSP430.td Change the default of AsmWriterClassName and isMCAsmWriter. 2013-12-02 04:55:42 +00:00
MSP430AsmPrinter.cpp Remove dead code. 2013-12-02 15:36:37 +00:00
MSP430BranchSelector.cpp
MSP430CallingConv.td Fix MSP430 calling convention to match MSPGCC 2013-10-15 08:19:39 +00:00
MSP430FrameLowering.cpp Provide the register scavenger to processFunctionBeforeFrameFinalized 2013-03-14 20:33:40 +00:00
MSP430FrameLowering.h Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
MSP430InstrFormats.td
MSP430InstrInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
MSP430InstrInfo.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
MSP430InstrInfo.td Use conventional syntax for branches. 2013-07-14 18:19:44 +00:00
MSP430ISelDAGToDAG.cpp ISelDAG: spot chain cycles involving MachineNodes 2013-09-22 08:21:56 +00:00
MSP430ISelLowering.cpp Mark some command line flags as hidden 2013-10-18 23:38:13 +00:00
MSP430ISelLowering.h Add jump tables handling for MSP430. 2013-07-01 19:44:44 +00:00
MSP430MachineFunctionInfo.cpp
MSP430MachineFunctionInfo.h
MSP430MCInstLower.cpp Add a helper getSymbol to AsmPrinter. 2013-10-29 17:07:16 +00:00
MSP430MCInstLower.h
MSP430RegisterInfo.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 06:30:15 +00:00
MSP430RegisterInfo.h Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 06:30:15 +00:00
MSP430RegisterInfo.td Make SubRegIndex size mandatory, following r183020. 2013-05-31 23:45:26 +00:00
MSP430SelectionDAGInfo.cpp
MSP430SelectionDAGInfo.h
MSP430Subtarget.cpp
MSP430Subtarget.h
MSP430TargetMachine.cpp Remove the MachineMove class. 2013-05-13 01:16:13 +00:00
MSP430TargetMachine.h
README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: Thid backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.