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8b41add6ca
When calculating the lanemask of a register class we have to include the masks of subregisters supported by any of the class members, not just the ones supported by all class members. This fixes problems when coalescing towards a subclass with additional subregisters available. The attached testcase works fine as is, but does crash if you enable subregister liveness on x86 without this change applied. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232652 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
806 B
LLVM
30 lines
806 B
LLVM
; RUN: llc -o - %s -verify-machineinstrs
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; This used to crash when coalescing a regclass like GR16 which did not support
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; the sub_8bit_hi subregister with a class like GR16_ABCD that did.
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target triple = "x86_64-apple-macosx10.10.0"
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define void @test() #0 {
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entry:
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br i1 undef, label %loop, label %for.end597
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loop:
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%0 = load i16, i16* null, align 4
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%1 = load i16, i16* undef, align 4
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%or1 = or i16 %1, %0
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%or2 = trunc i16 %or1 to i8
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store i8 %or2, i8* undef, align 4
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%2 = or i16 %1, %0
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%or3 = lshr i16 %2, 8
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%or4 = trunc i16 %or3 to i8
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store i8 %or4, i8* undef, align 1
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%3 = load i32, i32* undef, align 4
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%4 = load i32, i32* undef, align 4
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%or5 = or i32 %4, %3
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store i32 %or5, i32* undef, align 4
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store i32 0, i32* undef, align 4
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br label %loop
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for.end597:
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ret void
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}
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