llvm-6502/lib/Target/SparcV9/InstrSched
Vikram S. Adve 5f2180c533 (1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:05:23 +00:00
..
InstrScheduling.cpp Cleaned up code layout. No functional changes. 2003-05-22 21:49:18 +00:00
Makefile Makefile for InstrSched/ 2001-08-28 23:17:22 +00:00
SchedGraph.cpp (1) Added special register class containing (for now) %fsr. 2003-05-27 00:05:23 +00:00
SchedGraph.h Remove usage of MachineBasicBlock::get 2002-10-28 18:50:08 +00:00
SchedPriorities.cpp Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h 2003-01-14 23:05:08 +00:00
SchedPriorities.h More renamings of Target/Machine*Info to Target/Target*Info 2002-12-29 03:13:05 +00:00