mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
eb7876083d
This instructions writes to an 32-bit SGPR. This change required adding the 32-bit VCC_LO and VCC_HI registers, because the full VCC register is 64 bits. This fixes verifier errors on several of the indirect addressing piglit tests. Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204055 91177308-0d34-0410-b5e6-96231b3b80d8
217 lines
6.8 KiB
LLVM
217 lines
6.8 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK --check-prefix=FUNC
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; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
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; This test checks that uses and defs of the AR register happen in the same
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; instruction clause.
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; FUNC-LABEL: @mova_same_clause
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; R600-CHECK: MOVA_INT
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; R600-CHECK-NOT: ALU clause
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; R600-CHECK: 0 + AR.x
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; R600-CHECK: MOVA_INT
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; R600-CHECK-NOT: ALU clause
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; R600-CHECK: 0 + AR.x
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; SI-CHECK: V_READFIRSTLANE_B32 vcc_lo
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; SI-CHECK: V_MOVRELD
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; SI-CHECK: S_CBRANCH
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; SI-CHECK: V_READFIRSTLANE_B32 vcc_lo
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; SI-CHECK: V_MOVRELD
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; SI-CHECK: S_CBRANCH
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define void @mova_same_clause(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
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entry:
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%stack = alloca [5 x i32], align 4
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%0 = load i32 addrspace(1)* %in, align 4
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%arrayidx1 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 %0
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store i32 4, i32* %arrayidx1, align 4
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%arrayidx2 = getelementptr inbounds i32 addrspace(1)* %in, i32 1
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%1 = load i32 addrspace(1)* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 %1
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store i32 5, i32* %arrayidx3, align 4
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%arrayidx10 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 0
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%2 = load i32* %arrayidx10, align 4
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store i32 %2, i32 addrspace(1)* %out, align 4
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%arrayidx12 = getelementptr inbounds [5 x i32]* %stack, i32 0, i32 1
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%3 = load i32* %arrayidx12
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%arrayidx13 = getelementptr inbounds i32 addrspace(1)* %out, i32 1
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store i32 %3, i32 addrspace(1)* %arrayidx13
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ret void
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}
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; This test checks that the stack offset is calculated correctly for structs.
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; All register loads/stores should be optimized away, so there shouldn't be
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; any MOVA instructions.
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;
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; XXX: This generated code has unnecessary MOVs, we should be able to optimize
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; this.
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; FUNC-LABEL: @multiple_structs
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; R600-CHECK-NOT: MOVA_INT
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; SI-CHECK-NOT: V_MOVREL
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%struct.point = type { i32, i32 }
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define void @multiple_structs(i32 addrspace(1)* %out) {
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entry:
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%a = alloca %struct.point
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%b = alloca %struct.point
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%a.x.ptr = getelementptr %struct.point* %a, i32 0, i32 0
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%a.y.ptr = getelementptr %struct.point* %a, i32 0, i32 1
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%b.x.ptr = getelementptr %struct.point* %b, i32 0, i32 0
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%b.y.ptr = getelementptr %struct.point* %b, i32 0, i32 1
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store i32 0, i32* %a.x.ptr
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store i32 1, i32* %a.y.ptr
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store i32 2, i32* %b.x.ptr
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store i32 3, i32* %b.y.ptr
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%a.indirect.ptr = getelementptr %struct.point* %a, i32 0, i32 0
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%b.indirect.ptr = getelementptr %struct.point* %b, i32 0, i32 0
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%a.indirect = load i32* %a.indirect.ptr
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%b.indirect = load i32* %b.indirect.ptr
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%0 = add i32 %a.indirect, %b.indirect
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; Test direct access of a private array inside a loop. The private array
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; loads and stores should be lowered to copies, so there shouldn't be any
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; MOVA instructions.
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; FUNC-LABEL: @direct_loop
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; R600-CHECK-NOT: MOVA_INT
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; SI-CHECK-NOT: V_MOVREL
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define void @direct_loop(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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entry:
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%prv_array_const = alloca [2 x i32]
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%prv_array = alloca [2 x i32]
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%a = load i32 addrspace(1)* %in
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%b_src_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%b = load i32 addrspace(1)* %b_src_ptr
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%a_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0
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store i32 %a, i32* %a_dst_ptr
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%b_dst_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 1
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store i32 %b, i32* %b_dst_ptr
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br label %for.body
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for.body:
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%inc = phi i32 [0, %entry], [%count, %for.body]
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%x_ptr = getelementptr [2 x i32]* %prv_array_const, i32 0, i32 0
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%x = load i32* %x_ptr
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%y_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0
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%y = load i32* %y_ptr
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%xy = add i32 %x, %y
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store i32 %xy, i32* %y_ptr
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%count = add i32 %inc, 1
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%done = icmp eq i32 %count, 4095
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br i1 %done, label %for.end, label %for.body
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for.end:
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%value_ptr = getelementptr [2 x i32]* %prv_array, i32 0, i32 0
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%value = load i32* %value_ptr
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store i32 %value, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @short_array
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; R600-CHECK: MOV {{\** *}}T{{[0-9]\.[XYZW]}}, literal
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; R600-CHECK: 65536
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; R600-CHECK: *
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; R600-CHECK: MOVA_INT
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; SI-CHECK: V_MOV_B32_e32 v{{[0-9]}}, 65536
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; SI-CHECK: V_MOVRELS_B32_e32
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define void @short_array(i32 addrspace(1)* %out, i32 %index) {
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entry:
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%0 = alloca [2 x i16]
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%1 = getelementptr [2 x i16]* %0, i32 0, i32 0
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%2 = getelementptr [2 x i16]* %0, i32 0, i32 1
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store i16 0, i16* %1
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store i16 1, i16* %2
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%3 = getelementptr [2 x i16]* %0, i32 0, i32 %index
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%4 = load i16* %3
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%5 = sext i16 %4 to i32
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store i32 %5, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @char_array
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; R600-CHECK: OR_INT {{\** *}}T{{[0-9]\.[XYZW]}}, {{[PVT0-9]+\.[XYZW]}}, literal
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; R600-CHECK: 256
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; R600-CHECK: *
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; R600-CHECK-NEXT: MOVA_INT
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; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}, 256
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; SI-CHECK: V_MOVRELS_B32_e32
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define void @char_array(i32 addrspace(1)* %out, i32 %index) {
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entry:
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%0 = alloca [2 x i8]
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%1 = getelementptr [2 x i8]* %0, i32 0, i32 0
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%2 = getelementptr [2 x i8]* %0, i32 0, i32 1
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store i8 0, i8* %1
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store i8 1, i8* %2
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%3 = getelementptr [2 x i8]* %0, i32 0, i32 %index
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%4 = load i8* %3
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%5 = sext i8 %4 to i32
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store i32 %5, i32 addrspace(1)* %out
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ret void
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}
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; Make sure we don't overwrite workitem information with private memory
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; FUNC-LABEL: @work_item_info
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; R600-CHECK-NOT: MOV T0.X
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; Additional check in case the move ends up in the last slot
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; R600-CHECK-NOT: MOV * TO.X
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; SI-CHECK-NOT: V_MOV_B32_e{{(32|64)}} v0
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define void @work_item_info(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = alloca [2 x i32]
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%1 = getelementptr [2 x i32]* %0, i32 0, i32 0
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%2 = getelementptr [2 x i32]* %0, i32 0, i32 1
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store i32 0, i32* %1
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store i32 1, i32* %2
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%3 = getelementptr [2 x i32]* %0, i32 0, i32 %in
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%4 = load i32* %3
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%5 = call i32 @llvm.r600.read.tidig.x()
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%6 = add i32 %4, %5
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store i32 %6, i32 addrspace(1)* %out
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ret void
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}
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; Test that two stack objects are not stored in the same register
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; The second stack object should be in T3.X
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; FUNC-LABEL: @no_overlap
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; R600-CHECK: MOV {{\** *}}T3.X
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; SI-CHECK: V_MOV_B32_e32 v3
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define void @no_overlap(i32 addrspace(1)* %out, i32 %in) {
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entry:
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%0 = alloca [3 x i8], align 1
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%1 = alloca [2 x i8], align 1
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%2 = getelementptr [3 x i8]* %0, i32 0, i32 0
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%3 = getelementptr [3 x i8]* %0, i32 0, i32 1
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%4 = getelementptr [3 x i8]* %0, i32 0, i32 2
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%5 = getelementptr [2 x i8]* %1, i32 0, i32 0
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%6 = getelementptr [2 x i8]* %1, i32 0, i32 1
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store i8 0, i8* %2
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store i8 1, i8* %3
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store i8 2, i8* %4
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store i8 1, i8* %5
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store i8 0, i8* %6
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%7 = getelementptr [3 x i8]* %0, i32 0, i32 %in
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%8 = getelementptr [2 x i8]* %1, i32 0, i32 %in
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%9 = load i8* %7
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%10 = load i8* %8
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%11 = add i8 %9, %10
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%12 = sext i8 %11 to i32
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store i32 %12, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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