llvm-6502/test/CodeGen
Dan Gohman 73a902b228 Mark the SSE and MMX load instructions that
X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40736 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 14:27:55 +00:00
..
Alpha Fix a bug in getCopyFromParts turned up in the testcase for PR1132. 2007-07-30 19:09:17 +00:00
ARM Expand unaligned loads/stores when the target doesn't support them. (PR1548) 2007-08-01 19:34:21 +00:00
CBackend The Ada f-e produces various auxiliary output files 2007-07-23 15:23:35 +00:00
Generic Change the x86 assembly output to use tab characters to separate the 2007-07-31 20:11:57 +00:00
IA64 Convert .cvsignore files 2007-06-29 16:35:07 +00:00
PowerPC new testcase 2007-07-31 16:18:25 +00:00
SPARC Added test case from PR1540. 2007-07-13 23:57:33 +00:00
X86 Mark the SSE and MMX load instructions that 2007-08-02 14:27:55 +00:00