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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-17 05:31:32 +00:00
Kai Nacke 95fa1db8f5 [mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.
Octeon CPUs use dmtc2 rt,imm16 and dmfcp2 rt,imm16 for the crypto coprocessor.
E.g. dmtc2 rt,0x4057 starts calculation of sha-1.

I had to introduce a new deconding namespace to avoid a decoding conflict.

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D10083


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238439 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 16:23:16 +00:00
..
2015-04-27 22:04:24 +00:00