Matt Arsenault fc65cf649c R600/SI: Fix extra whitespace in asm str ... This slipped in in r214467, so something like V_MOV_B32_e32 v0, ... is now printed with 2 spaces between the instruction name and first operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214660 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-03 05:27:14 +00:00
..
AArch64	Update test to use a more modern AArch64 triple, as requested by Renato.	2014-08-02 17:15:11 +00:00
ARM	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
CPP
Generic
Hexagon
Inputs
Mips	llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.	2014-08-01 22:15:38 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Recognize consecutive memory accesses from intrinsics	2014-08-01 01:02:01 +00:00
R600	R600/SI: Fix extra whitespace in asm str	2014-08-03 05:27:14 +00:00
SPARC
SystemZ
Thumb	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
Thumb2	[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly	2014-08-02 05:40:40 +00:00
X86	[x86] Give this test a bare metal triple so it doesn't use the weird	2014-08-02 11:17:41 +00:00
XCore