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llvm-6502/test/CodeGen/Thumb2/thumb2-orr.ll
Saleem Abdulrasool 2abadea537 ARM: yet another round of ARM test clean ups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205586 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 23:47:24 +00:00

43 lines
901 B
LLVM

; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
define i32 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: orrs r0, r1
%tmp2 = or i32 %a, %b
ret i32 %tmp2
}
define i32 @f5(i32 %a, i32 %b) {
; CHECK-LABEL: f5:
; CHECK: orr.w r0, r0, r1, lsl #5
%tmp = shl i32 %b, 5
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f6(i32 %a, i32 %b) {
; CHECK-LABEL: f6:
; CHECK: orr.w r0, r0, r1, lsr #6
%tmp = lshr i32 %b, 6
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f7(i32 %a, i32 %b) {
; CHECK-LABEL: f7:
; CHECK: orr.w r0, r0, r1, asr #7
%tmp = ashr i32 %b, 7
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}
define i32 @f8(i32 %a, i32 %b) {
; CHECK-LABEL: f8:
; CHECK: orr.w r0, r0, r0, ror #8
%l8 = shl i32 %a, 24
%r8 = lshr i32 %a, 8
%tmp = or i32 %l8, %r8
%tmp2 = or i32 %a, %tmp
ret i32 %tmp2
}