llvm-6502/test/CodeGen/NVPTX
Artem Belevich 97f4d01ee1 Add support for __nvvm_reflect changes in libdevice in CUDA-7.0
Summary:
CUDA 7.0's libdevice uses slightly different IR to call __nvvm_reflect
and that triggers an assertion in nvvm_reflect optimization pass. This
change allows nvvm_reflect pass to deal with both old and new ways to
pass an argument to __nvvm_reflect.

Test Plan: ninja check-all

Reviewers: eliben, echristo

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232732 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 17:05:35 +00:00
..
access-non-generic.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
add-128bit.ll
addrspacecast-gvar.ll [NVPTX] Add support for addrspacecast in global variable initializers, including emitting generic() when casting to address space 0. 2014-04-09 15:39:11 +00:00
addrspacecast.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
aggr-param.ll
annotations.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
arg-lowering.ll [NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors 2014-06-27 18:35:44 +00:00
arithmetic-fp-sm20.ll
arithmetic-int.ll
atomics.ll
bfe.ll
bug17709.ll
bug21465.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
bug22246.ll [NVPTX] Generate a more optimal sequence for select of i1 2015-01-26 19:52:20 +00:00
bug22322.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
call-with-alloca-buffer.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
callchain.ll
calling-conv.ll
compare-int.ll
constant-vectors.ll [NVPTX] Make constant vector test case endian-independent 2013-09-19 13:14:44 +00:00
convert-fp.ll
convert-int-sm20.ll
ctlz.ll
ctpop.ll
cttz.ll
div-ri.ll [NVPTX] Add missing patterns for div.approx with immediate denominator 2014-01-21 14:40:05 +00:00
envreg.ll
fast-math.ll
fma-assoc.ll
fma-disable.ll This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. 2012-05-04 20:18:50 +00:00
fma.ll
fp16.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
fp-contract.ll [NVPTX] Improve handling of FP fusion 2014-07-17 18:10:09 +00:00
fp-literals.ll
function-align.ll [NVPTXAsmPrinter] do not print .align on function headers 2015-03-12 01:50:30 +00:00
generic-to-nvvm.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
global-ordering.ll [NVPTX] Order global variables in def-use order before emiting them in the final assembly 2012-11-16 21:03:51 +00:00
gvar-init.ll
half.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
i1-global.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
i1-int-to-fp.ll
i1-param.ll
i8-param.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
imad.ll
implicit-def.ll [NVPTX] Improve handling of FP fusion 2014-07-17 18:10:09 +00:00
inline-asm.ll
intrin-nocapture.ll
intrinsic-old.ll [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 2014-07-16 16:26:58 +00:00
intrinsics.ll
isspacep.ll [NVPTX] Add support for isspacep instruction 2014-06-27 18:35:24 +00:00
ld-addrspace.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
ld-generic.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
ldparam-v4.ll
ldu-i8.ll
ldu-ldg.ll
ldu-reg-plus-offset.ll
lit.local.cfg
load-sext-i1.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
local-stack-frame.ll [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 2014-07-16 16:26:58 +00:00
machine-sink.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
managed.ll
misaligned-vector-ldst.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
module-inline-asm.ll [NVPTX] Add support for module-scope inline asm 2013-07-01 13:00:14 +00:00
mulwide.ll
noduplicate-syncthreads.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
nounroll.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
nvcl-param-align.ll
nvvm-reflect.ll Add support for __nvvm_reflect changes in libdevice in CUDA-7.0 2015-03-19 17:05:35 +00:00
param-align.ll
pr13291-i1-store.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
pr16278.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
pr17529.ll
ptx-version-30.ll
ptx-version-31.ll [NVPTX] Add more precise PTX/SM target attributes 2012-11-12 03:16:43 +00:00
refl1.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
rotate.ll
rsqrt.ll
sched1.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
sched2.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
sext-in-reg.ll
sext-params.ll
shift-parts.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
simple-call.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 2014-07-16 16:26:58 +00:00
st-generic.ll
surf-read-cuda.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
surf-read.ll
surf-write-cuda.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
surf-write.ll
symbol-naming.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
tex-read-cuda.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
tex-read.ll
texsurf-queries.ll IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
tuple-literal.ll
vec8.ll
vec-param-load.ll Fix non-deterministic SDNodeOrder-dependent codegen 2014-01-12 14:09:17 +00:00
vector-args.ll
vector-call.ll [NVPTX] Add missing .v4 qualifier on vector store instruction 2014-07-17 16:58:56 +00:00
vector-compare.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
vector-global.ll
vector-loads.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
vector-return.ll
vector-select.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
vector-stores.ll
weak-global.ll [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 2015-02-27 21:17:42 +00:00
weak-linkage.ll