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https://github.com/c64scene-ar/llvm-6502.git
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cdd4737be8
The QPX single-precision load/store intrinsics have implied truncation/extension from/to the declared value type of <4 x double> to the memory type of <4 x float>. When we can prove the alignment of the pointer argument, and thus replace the intrinsic with a regular load or store, we need to load or store the correct data type (<4 x float>) instead of (<4 x double>). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236973 91177308-0d34-0410-b5e6-96231b3b80d8
166 lines
4.7 KiB
LLVM
166 lines
4.7 KiB
LLVM
; RUN: opt -S -instcombine < %s | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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declare <4 x double> @llvm.ppc.qpx.qvlfs(i8*) #1
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define <4 x double> @test1(<4 x float>* %h) #0 {
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entry:
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%h1 = getelementptr <4 x float>, <4 x float>* %h, i64 1
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%hv = bitcast <4 x float>* %h1 to i8*
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%vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
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; CHECK-LABEL: @test1
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; CHECK: @llvm.ppc.qpx.qvlfs
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; CHECK: ret <4 x double>
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%v0 = load <4 x float>, <4 x float>* %h, align 8
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%v0e = fpext <4 x float> %v0 to <4 x double>
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%a = fadd <4 x double> %v0e, %vl
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ret <4 x double> %a
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}
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define <4 x double> @test1a(<4 x float>* align 16 %h) #0 {
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entry:
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%h1 = getelementptr <4 x float>, <4 x float>* %h, i64 1
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%hv = bitcast <4 x float>* %h1 to i8*
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%vl = call <4 x double> @llvm.ppc.qpx.qvlfs(i8* %hv)
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; CHECK-LABEL: @test1a
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; CHECK-NOT: @llvm.ppc.qpx.qvlfs
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; CHECK-NOT: load <4 x double>
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; CHECK: ret <4 x double>
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%v0 = load <4 x float>, <4 x float>* %h, align 8
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%v0e = fpext <4 x float> %v0 to <4 x double>
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%a = fadd <4 x double> %v0e, %vl
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ret <4 x double> %a
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}
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declare void @llvm.ppc.qpx.qvstfs(<4 x double>, i8*) #0
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define <4 x float> @test2(<4 x float>* %h, <4 x double> %d) #0 {
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entry:
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%h1 = getelementptr <4 x float>, <4 x float>* %h, i64 1
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%hv = bitcast <4 x float>* %h1 to i8*
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call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
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%v0 = load <4 x float>, <4 x float>* %h, align 8
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ret <4 x float> %v0
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; CHECK-LABEL: @test2
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; CHECK: @llvm.ppc.qpx.qvstfs
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; CHECK: ret <4 x float>
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}
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define <4 x float> @test2a(<4 x float>* align 16 %h, <4 x double> %d) #0 {
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entry:
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%h1 = getelementptr <4 x float>, <4 x float>* %h, i64 1
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%hv = bitcast <4 x float>* %h1 to i8*
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call void @llvm.ppc.qpx.qvstfs(<4 x double> %d, i8* %hv)
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%v0 = load <4 x float>, <4 x float>* %h, align 8
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ret <4 x float> %v0
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; CHECK-LABEL: @test2
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; CHECK: fptrunc <4 x double> %d to <4 x float>
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; CHECK-NOT: @llvm.ppc.qpx.qvstfs
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; CHECK-NOT: store <4 x double>
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; CHECK: ret <4 x float>
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}
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declare <4 x double> @llvm.ppc.qpx.qvlfd(i8*) #1
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define <4 x double> @test1l(<4 x double>* %h) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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%vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
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; CHECK-LABEL: @test1l
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; CHECK: @llvm.ppc.qpx.qvlfd
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; CHECK: ret <4 x double>
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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%a = fadd <4 x double> %v0, %vl
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ret <4 x double> %a
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}
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define <4 x double> @test1ln(<4 x double>* align 16 %h) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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%vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
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; CHECK-LABEL: @test1ln
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; CHECK: @llvm.ppc.qpx.qvlfd
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; CHECK: ret <4 x double>
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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%a = fadd <4 x double> %v0, %vl
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ret <4 x double> %a
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}
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define <4 x double> @test1la(<4 x double>* align 32 %h) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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%vl = call <4 x double> @llvm.ppc.qpx.qvlfd(i8* %hv)
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; CHECK-LABEL: @test1la
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; CHECK-NOT: @llvm.ppc.qpx.qvlfd
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; CHECK: ret <4 x double>
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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%a = fadd <4 x double> %v0, %vl
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ret <4 x double> %a
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}
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declare void @llvm.ppc.qpx.qvstfd(<4 x double>, i8*) #0
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define <4 x double> @test2l(<4 x double>* %h, <4 x double> %d) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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ret <4 x double> %v0
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; CHECK-LABEL: @test2l
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; CHECK: @llvm.ppc.qpx.qvstfd
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; CHECK: ret <4 x double>
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}
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define <4 x double> @test2ln(<4 x double>* align 16 %h, <4 x double> %d) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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ret <4 x double> %v0
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; CHECK-LABEL: @test2ln
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; CHECK: @llvm.ppc.qpx.qvstfd
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; CHECK: ret <4 x double>
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}
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define <4 x double> @test2la(<4 x double>* align 32 %h, <4 x double> %d) #0 {
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entry:
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%h1 = getelementptr <4 x double>, <4 x double>* %h, i64 1
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%hv = bitcast <4 x double>* %h1 to i8*
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call void @llvm.ppc.qpx.qvstfd(<4 x double> %d, i8* %hv)
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%v0 = load <4 x double>, <4 x double>* %h, align 8
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ret <4 x double> %v0
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; CHECK-LABEL: @test2l
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; CHECK-NOT: @llvm.ppc.qpx.qvstfd
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; CHECK: ret <4 x double>
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readonly }
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