Tilmann Scheller b1424d72ca [ARM] Add Thumb-2 code size optimization test for ASR (immediate). ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216744 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-29 17:02:28 +00:00
..
AArch64	AArch64: only try to get operand of a known node.	2014-08-29 15:34:58 +00:00
ARM	[ARM] Add Thumb-2 code size optimization test for ASR (immediate).	2014-08-29 17:02:28 +00:00
CPP
Generic	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
Hexagon	DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.	2014-08-06 00:21:25 +00:00
Inputs
Mips	[mips] Don't use odd-numbered float registers for double arguments for fastcc	2014-08-22 09:23:22 +00:00
MSP430	Do not assume the value passed to memset is an i32.	2014-08-29 08:23:53 +00:00
NVPTX	[NVPTX] Make the alignment an explicit argument to ldu/ldg	2014-08-29 15:30:20 +00:00
PowerPC	[PowerPC] Add support for dcbtst and icbt (prefetch)	2014-08-23 23:21:04 +00:00
R600	R600/SI: Use mad for fsub + fmul	2014-08-29 16:01:14 +00:00
SPARC
SystemZ
Thumb	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
Thumb2	ARM / x86_64 varargs: Don't save regparms in prologue without va_start	2014-08-22 21:59:26 +00:00
X86	[SKX] Enable lowering of integer CMP operations.	2014-08-29 08:46:04 +00:00
XCore