Vladimir Medic b15da6dc09 Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190397 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-10 09:50:01 +00:00
..
AArch64	Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,	2013-09-09 02:20:27 +00:00
ARM	[ARMv8] Add some missing tests for DSB/DMB.	2013-09-05 16:05:45 +00:00
AsmParser	Improve handling of .file, .include and .incbin directives to	2013-09-05 19:14:26 +00:00
COFF
Disassembler	Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions,	2013-09-09 02:20:27 +00:00
ELF
MachO	Fixed a crash in the integrated assembler for Mach-O when a symbol difference	2013-09-05 20:25:06 +00:00
Markup
Mips	Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit.	2013-09-10 09:50:01 +00:00
PowerPC
SystemZ	[SystemZ] Add NC, OC and XC	2013-09-05 10:36:45 +00:00
X86	[ms-inline asm] Support offsets after segment registers	2013-08-27 21:56:17 +00:00