Evan Cheng 623a7e146b Use a bigger hammer to fix PR11314 by disabling the "forcing two-address ... instruction lower optimization" in the pre-RA scheduler. The optimization, rather the hack, was done before MI use-list was available. Now we should be able to implement it in a better way, perhaps in the two-address pass until a MI scheduler is available. Now that the scheduler has to backtrack to handle call sequences. Adding artificial scheduling constraints is just not safe. Furthermore, the hack is not taking all the other scheduling decisions into consideration so it's just as likely to pessimize code. So I view disabling this optimization goodness regardless of PR11314. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144267 91177308-0d34-0410-b5e6-96231b3b80d8		2011-11-10 07:43:16 +00:00
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Analysis	Fix typo in comment.	2011-11-09 22:45:04 +00:00
Archive
AsmParser
Bitcode
CodeGen	Use a bigger hammer to fix PR11314 by disabling the "forcing two-address	2011-11-10 07:43:16 +00:00
DebugInfo	Audited all the format strings in libDebugInfo and fixed those that didn't match the types.	2011-11-05 16:01:13 +00:00
ExecutionEngine
Linker
MC	Simplify code. No functionality change.	2011-11-09 13:19:15 +00:00
Object	Object/COFF: Fix PE reading.	2011-11-08 23:34:07 +00:00
Support	Fix a typo.	2011-11-06 20:36:50 +00:00
TableGen
Target	AVX2: Add variable shift from memory.	2011-11-10 06:54:20 +00:00
Transforms	DeadStoreElimination can now trim the size of a store if the end of the store is dead.	2011-11-09 23:07:35 +00:00
VMCore
CMakeLists.txt
LLVMBuild.txt
Makefile