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https://github.com/c64scene-ar/llvm-6502.git
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b1e8cad61e
which is represented in codegen as an 'and' operation. This matches them with movz instructions, instead of leaving them to be matched by and instructions with an immediate field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
526 B
LLVM
19 lines
526 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 | not grep and
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; These tests differ from the ones in zext-inreg-0.ll in that
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; on x86-64 they do require and instructions.
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; These should use movzbl instead of 'and 255'.
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; This related to not having ZERO_EXTEND_REG node.
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define i64 @g(i64 %d) nounwind {
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%e = add i64 %d, 1
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%retval = and i64 %e, 1099511627775
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ret i64 %retval
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}
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define i64 @h(i64 %d) nounwind {
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%e = add i64 %d, 1
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%retval = and i64 %e, 281474976710655
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ret i64 %retval
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}
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