llvm-6502/test
Hal Finkel b1fd3cd78f Implement PPC counter loops as a late IR-level pass
The old PPCCTRLoops pass, like the Hexagon pass version from which it was
derived, could only handle some simple loops in canonical form. We cannot
directly adapt the new Hexagon hardware loops pass, however, because the
Hexagon pass contains a fundamental assumption that non-constant-trip-count
loops will contain a guard, and this is not always true (the result being that
incorrect negative counts can be generated). With this commit, we replace the
pass with a late IR-level pass which makes use of SE to calculate the
backedge-taken counts and safely generate the loop-count expressions (including
any necessary max() parts). This IR level pass inserts custom intrinsics that
are lowered into the desired decrement-and-branch instructions.

The most fragile part of this new implementation is that interfering uses of
the counter register must be detected on the IR level (and, on PPC, this also
includes any indirect branches in addition to function calls). Also, to make
all of this work, we need a variant of the mtctr instruction that is marked
as having side effects. Without this, machine-code level CSE, DCE, etc.
illegally transform the resulting code. Hopefully, this can be improved
in the future.

This new pass is smaller than the original (and much smaller than the new
Hexagon hardware loops pass), and can handle many additional cases correctly.
In addition, the preheader-creation code has been copied from LoopSimplify, and
after we decide on where it belongs, this code will be refactored so that it
can be explicitly shared (making this implementation even smaller).

The new test-case files ctrloop-{le,lt,ne}.ll have been adapted from tests for
the new Hexagon pass. There are a few classes of loops that this pass does not
transform (noted by FIXMEs in the files), but these deficiencies can be
addressed within the SE infrastructure (thus helping many other passes as well).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-15 21:37:41 +00:00
..
Analysis AArch64: use MCJIT by default and enable related tests. 2013-05-06 16:51:08 +00:00
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen Implement PPC counter loops as a late IR-level pass 2013-05-15 21:37:41 +00:00
DebugInfo Give the test from r181632 a target triple. 2013-05-10 22:14:39 +00:00
ExecutionEngine XFAIL this test for mingw too. 2013-05-13 00:18:24 +00:00
Feature
FileCheck Add 'CHECK-DAG' support 2013-05-14 20:34:12 +00:00
Instrumentation
Integer
JitListener
Linker
MC [PowerPC] Remove need for adjustFixupOffst hack 2013-05-15 15:07:06 +00:00
Object Object: Fix Mach-O relocation printing. 2013-05-14 22:41:29 +00:00
Other
TableGen
tools
Transforms LoopVectorize: Hoist conditional loads if possible 2013-05-15 01:44:30 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg AArch64: use MCJIT by default and enable related tests. 2013-05-06 16:51:08 +00:00
lit.site.cfg.in Allow host triple to be correctly overridden in CMake builds 2013-05-04 07:36:23 +00:00
Makefile Allow host triple to be correctly overridden in CMake builds 2013-05-04 07:36:23 +00:00
Makefile.tests
TestRunner.sh