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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
900 B
LLVM
28 lines
900 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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; Check that we generate conversion from single precision floating point
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; to 64-bit int value in IEEE complaint mode in V5.
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; CHECK: r{{[0-9]+}}:{{[0-9]+}} = convert_sf2d(r{{[0-9]+}})
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define i32 @main() nounwind {
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entry:
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%retval = alloca i32, align 4
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%i = alloca i64, align 8
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%a = alloca float, align 4
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%b = alloca float, align 4
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%c = alloca float, align 4
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store i32 0, i32* %retval
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store float 0x402ECCCCC0000000, float* %a, align 4
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store float 0x4022333340000000, float* %b, align 4
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%0 = load float, float* %a, align 4
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%1 = load float, float* %b, align 4
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%add = fadd float %0, %1
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store float %add, float* %c, align 4
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%2 = load float, float* %c, align 4
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%conv = fptosi float %2 to i64
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store i64 %conv, i64* %i, align 8
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%3 = load i64, i64* %i, align 8
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%conv1 = trunc i64 %3 to i32
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ret i32 %conv1
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}
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