Andrea Di Biagio b2f47c6a34 Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR of ... ConstantSDNodes (or UNDEFs) into a simple BUILD_VECTOR. For example, given the following sequence of dag nodes: i32 C = Constant<1> v4i32 V = BUILD_VECTOR C, C, C, C v4i32 Result = SIGN_EXTEND_INREG V, ValueType:v4i1 The SIGN_EXTEND_INREG node can be folded into a build_vector since the vector in input is a BUILD_VECTOR of constants. The optimized sequence is: i32 C = Constant<-1> v4i32 Result = BUILD_VECTOR C, C, C, C git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198084 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-27 20:20:28 +00:00
..
AArch64	[AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.	2013-12-25 07:12:34 +00:00
ARM	Unbreak ARM buildbots after r197653 by forcing the target triple on this test.	2013-12-19 18:14:42 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Fix pr18235.	2013-12-13 16:05:32 +00:00
Hexagon
Inputs
Mips	[Mips] Does not take in account 'use-soft-float' attribute's value when	2013-12-25 17:00:27 +00:00
MSP430
NVPTX
PowerPC	Implement initial-exec TLS for PPC32.	2013-12-20 18:08:54 +00:00
R600	R600: Allow ftrunc	2013-12-20 05:11:55 +00:00
SPARC	[Sparc] Lower and MachineInstr to MC and print assembly using MCInstPrinter.	2013-12-26 01:49:59 +00:00
SystemZ	[SystemZ] Use interlocked-access 1 instructions for CodeGen	2013-12-24 15:18:04 +00:00
Thumb	Correctly handle the degenerated triple "thumb".	2013-12-18 21:29:44 +00:00
Thumb2
X86	Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR of	2013-12-27 20:20:28 +00:00
XCore