mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-06 21:05:51 +00:00
f9d2d2dc89
Added parsing of mask register and "zeroing" semantic, like {%k1} {z}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190595 91177308-0d34-0410-b5e6-96231b3b80d8
128 lines
3.2 KiB
LLVM
128 lines
3.2 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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; CHECK-LABEL: trunc_16x32_to_16x8
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; CHECK: vpmovdb
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; CHECK: ret
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define <16 x i8> @trunc_16x32_to_16x8(<16 x i32> %i) nounwind readnone {
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%x = trunc <16 x i32> %i to <16 x i8>
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ret <16 x i8> %x
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}
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; CHECK-LABEL: trunc_8x64_to_8x16
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; CHECK: vpmovqw
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; CHECK: ret
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define <8 x i16> @trunc_8x64_to_8x16(<8 x i64> %i) nounwind readnone {
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%x = trunc <8 x i64> %i to <8 x i16>
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ret <8 x i16> %x
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}
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; CHECK-LABEL: zext_16x8_to_16x32
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; CHECK; vpmovzxbd {{.*}}%zmm
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; CHECK: ret
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define <16 x i32> @zext_16x8_to_16x32(<16 x i8> %i) nounwind readnone {
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%x = zext <16 x i8> %i to <16 x i32>
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ret <16 x i32> %x
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}
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; CHECK-LABEL: sext_16x8_to_16x32
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; CHECK; vpmovsxbd {{.*}}%zmm
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; CHECK: ret
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define <16 x i32> @sext_16x8_to_16x32(<16 x i8> %i) nounwind readnone {
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%x = sext <16 x i8> %i to <16 x i32>
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ret <16 x i32> %x
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}
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; CHECK-LABEL: zext_16x16_to_16x32
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; CHECK; vpmovzxwd {{.*}}%zmm
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; CHECK: ret
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define <16 x i32> @zext_16x16_to_16x32(<16 x i16> %i) nounwind readnone {
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%x = zext <16 x i16> %i to <16 x i32>
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ret <16 x i32> %x
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}
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; CHECK-LABEL: zext_8x16_to_8x64
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; CHECK; vpmovzxwq
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; CHECK: ret
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define <8 x i64> @zext_8x16_to_8x64(<8 x i16> %i) nounwind readnone {
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%x = zext <8 x i16> %i to <8 x i64>
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ret <8 x i64> %x
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}
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;CHECK-LABEL: fptrunc_test
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;CHECK: vcvtpd2ps {{.*}}%zmm
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;CHECK: ret
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define <8 x float> @fptrunc_test(<8 x double> %a) nounwind readnone {
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%b = fptrunc <8 x double> %a to <8 x float>
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ret <8 x float> %b
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}
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;CHECK-LABEL: fpext_test
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;CHECK: vcvtps2pd {{.*}}%zmm
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;CHECK: ret
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define <8 x double> @fpext_test(<8 x float> %a) nounwind readnone {
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%b = fpext <8 x float> %a to <8 x double>
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ret <8 x double> %b
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}
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; CHECK-LABEL: zext_16i1_to_16xi32
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; CHECK: vpbroadcastd LCP{{.*}}(%rip), %zmm0 {%k1} {z}
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; CHECK: ret
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define <16 x i32> @zext_16i1_to_16xi32(i16 %b) {
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%a = bitcast i16 %b to <16 x i1>
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%c = zext <16 x i1> %a to <16 x i32>
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ret <16 x i32> %c
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}
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; CHECK-LABEL: zext_8i1_to_8xi64
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; CHECK: vpbroadcastq LCP{{.*}}(%rip), %zmm0 {%k1} {z}
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; CHECK: ret
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define <8 x i64> @zext_8i1_to_8xi64(i8 %b) {
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%a = bitcast i8 %b to <8 x i1>
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%c = zext <8 x i1> %a to <8 x i64>
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ret <8 x i64> %c
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}
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; CHECK-LABEL: trunc_16i8_to_16i1
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; CHECK: vpmovsxbd
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; CHECK: vpandd
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; CHECK: vptestmd
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; CHECK: ret
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define i16 @trunc_16i8_to_16i1(<16 x i8> %a) {
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%mask_b = trunc <16 x i8>%a to <16 x i1>
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%mask = bitcast <16 x i1> %mask_b to i16
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ret i16 %mask
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}
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; CHECK-LABEL: trunc_16i32_to_16i1
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; CHECK: vpandd
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; CHECK: vptestmd
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; CHECK: ret
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define i16 @trunc_16i32_to_16i1(<16 x i32> %a) {
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%mask_b = trunc <16 x i32>%a to <16 x i1>
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%mask = bitcast <16 x i1> %mask_b to i16
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ret i16 %mask
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}
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; CHECK-LABEL: trunc_8i16_to_8i1
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; CHECK: vpmovsxwq
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; CHECK: vpandq LCP{{.*}}(%rip){1to8}
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; CHECK: vptestmq
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; CHECK: ret
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define i8 @trunc_8i16_to_8i1(<8 x i16> %a) {
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%mask_b = trunc <8 x i16>%a to <8 x i1>
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%mask = bitcast <8 x i1> %mask_b to i8
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ret i8 %mask
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}
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; CHECK: sext_8i1_8i32
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; CHECK: vpbroadcastq LCP{{.*}}(%rip), %zmm0 {%k1} {z}
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; CHECK: ret
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define <8 x i32> @sext_8i1_8i32(<8 x i32> %a1, <8 x i32> %a2) nounwind {
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%x = icmp slt <8 x i32> %a1, %a2
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%x1 = xor <8 x i1>%x, <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>
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%y = sext <8 x i1> %x1 to <8 x i32>
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ret <8 x i32> %y
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}
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