Jim Grosbach b3af5de2d9 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern ... and handle the operand explicitly. Flesh out encoding information. Add an explicit disassembler testcase for the instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-13 21:00:04 +00:00
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arm-tests.txt	Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern	2010-10-13 21:00:04 +00:00
dg.exp	tests: MC/Disassembler tests depend on ARM support being compiler in.	2010-04-15 03:47:20 +00:00
neon-tests.txt	Fix vmov.f64 disassembly on targets where sizeof(long) != 8.	2010-09-17 23:48:07 +00:00
simple-tests.txt	Added a testcase for the ENTER instruction.	2010-10-05 00:21:40 +00:00
thumb-tests.txt	Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid	2010-08-17 17:23:19 +00:00