llvm-6502/test/CodeGen
Kalle Raiskila 940e7965f1 Improve lowering of sext to i128 on SPU.
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 09:34:19 +00:00
..
Alpha
ARM ARM instructions that are both predicated and set the condition codes 2010-10-15 03:23:44 +00:00
Blackfin
CBackend
CellSPU Improve lowering of sext to i128 on SPU. 2010-10-18 09:34:19 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PowerPC PowerPC varargs functions store live-in registers on the stack. Make sure we use 2010-10-11 20:43:09 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2 Change register allocation order for ARM VFP and NEON registers to put the 2010-10-08 06:15:13 +00:00
X86 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 2010-10-16 08:25:41 +00:00
XCore
thumb2-mul.ll