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b4ac342ea0
llvm-6502/test/MC/Disassembler/ARM
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Johnny Chen b4ac342ea0 The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.cpp to disassemble the 
VORRiv*i* instructions properly within the DisassembleN1RegModImmFrm() function.  Add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 18:40:38 +00:00
..
arm-tests.txt Load/Store Multiple: 2011-03-24 01:40:42 +00:00
dg.exp
invalid-CPS3p-arm.txt Add comments to the handling of opcode CPS3p to reject invalid instruction encoding, 2011-03-24 17:04:22 +00:00
invalid-VLDMSDB-arm.txt Add comments to the handling of opcode CPS3p to reject invalid instruction encoding, 2011-03-24 17:04:22 +00:00
neon-tests.txt The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.cpp to disassemble the 2011-03-24 18:40:38 +00:00
thumb-tests.txt Add disassembly test cases for: 2011-03-22 23:08:56 +00:00