llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-13 07:29:38 +00:00

History

Evan Cheng ffc0e73046 Change createAsmParser to take a MCSubtargetInfo instead of triple, CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-09 05:47:46 +00:00
..
TargetInfo	make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.	2010-01-24 20:43:08 +00:00
Alpha.h	Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc	2011-06-28 20:07:07 +00:00
Alpha.td	Fix a ton of comment typos found by codespell. Patch by	2011-04-15 05:18:47 +00:00
AlphaAsmPrinter.cpp	move all the target's asmprinters into the main target. The piece	2010-11-14 18:43:56 +00:00
AlphaBranchSelector.cpp	Reapply r110396, with fixes to appease the Linux buildbot gods.	2010-08-06 18:33:48 +00:00
AlphaCallingConv.td	Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that error. May not fix it in an ABI complient way. It wasn't clear what gcc does	2010-03-03 20:15:31 +00:00
AlphaFrameLowering.cpp	Teach frame lowering to ignore debug values after the terminators.	2011-01-13 21:28:52 +00:00
AlphaFrameLowering.h	Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.	2011-01-10 12:39:04 +00:00
AlphaInstrFormats.td	Remove isTwoAddress from Alpha.	2010-06-21 18:48:55 +00:00
AlphaInstrInfo.cpp	Hide the call to InitMCInstrInfo into tblgen generated ctor.	2011-07-01 17:57:27 +00:00
AlphaInstrInfo.h	Hide the call to InitMCInstrInfo into tblgen generated ctor.	2011-07-01 17:57:27 +00:00
AlphaInstrInfo.td	Fix a ton of comment typos found by codespell. Patch by	2011-04-15 05:18:47 +00:00
AlphaISelDAGToDAG.cpp	rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for	2010-12-21 02:38:05 +00:00
AlphaISelLowering.cpp	Add an intrinsic and codegen support for fused multiply-accumulate. The intent	2011-07-08 21:39:21 +00:00
AlphaISelLowering.h	Move Alpha from getRegClassForInlineAsmConstraint to	2011-06-29 19:40:01 +00:00
AlphaLLRP.cpp	Reapply r110396, with fixes to appease the Linux buildbot gods.	2010-08-06 18:33:48 +00:00
AlphaMachineFunctionInfo.h	Move per-function state out of TargetLowering subclasses and into	2010-04-17 14:41:14 +00:00
AlphaMCAsmInfo.cpp	Don't pass StringRef by reference.	2010-07-14 22:38:02 +00:00
AlphaMCAsmInfo.h	Don't pass StringRef by reference.	2010-07-14 22:38:02 +00:00
AlphaRegisterInfo.cpp	Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.	2011-06-28 21:14:33 +00:00
AlphaRegisterInfo.h	Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc	2011-06-27 18:32:37 +00:00
AlphaRegisterInfo.td	Use set operations instead of plain lists to enumerate register classes.	2011-06-15 23:28:14 +00:00
AlphaRelocations.h
AlphaSchedule.td	Add support to model pipeline bypass / forwarding.	2010-09-28 23:50:49 +00:00
AlphaSelectionDAGInfo.cpp	Implement a bunch more TargetSelectionDAGInfo infrastructure.	2010-05-11 17:31:57 +00:00
AlphaSelectionDAGInfo.h	Implement a bunch more TargetSelectionDAGInfo infrastructure.	2010-05-11 17:31:57 +00:00
AlphaSubtarget.cpp	Change createAsmParser to take a MCSubtargetInfo instead of triple,	2011-07-09 05:47:46 +00:00
AlphaSubtarget.h	Compute feature bits at time of MCSubtargetInfo initialization.	2011-07-07 07:07:08 +00:00
AlphaTargetMachine.cpp	Eliminate asm parser's dependency on TargetMachine:	2011-07-08 01:53:10 +00:00
AlphaTargetMachine.h	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	2011-06-30 01:53:36 +00:00
CMakeLists.txt	Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.	2011-07-01 22:36:09 +00:00
Makefile	Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.	2011-07-01 22:36:09 +00:00
README.txt	Fix a ton of comment typos found by codespell. Patch by	2011-04-15 05:18:47 +00:00

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html