llvm-6502/test/CodeGen
Jim Grosbach b5aa11f2d6 fix silly typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 17:32:46 +00:00
..
Alpha
ARM Consider this code snippet: 2010-08-11 08:43:16 +00:00
Blackfin
CBackend
CellSPU Have SPU handle halfvec stores aligned by 8 bytes. 2010-08-09 16:33:00 +00:00
CPP
Generic
MBlaze
Mips
MSP430
PIC16
PowerPC PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR. 2010-08-02 00:18:19 +00:00
SPARC
SystemZ
Thumb Fix test and re-enable it. 2010-08-11 17:25:51 +00:00
Thumb2 fix silly typo 2010-08-11 17:32:46 +00:00
X86 Fix test for more architectures. Patch by Tobias Grosser. 2010-08-10 16:48:24 +00:00
XCore